"My core will always add the same number of clocks for each addressiing mode no matter what instruction it is for." I should clarify that the core does not add the same number of clocks across all addressing modes. Each EA mode has a different number of clocks which the core will add no matter which …

Yes I was very interested to learn from Reenigne that the 8088 appears to add a clock for some instructions such as lea dx,[bx+di], yet does not for lea dx,[bx+si] while both cmp[bx+di],dx and cmp [bx+si],dx take the same number of cycles. My core will always add the same number of clocks for each …

Hi, I am a big fan of 8088MPH and I have developed an x86 processor core, so naturally I had to give this demo a try! The core is called the MCL86 and it is a microsequencer based, cycle compatible, x86 soft IP core. Here is the YouTube video of it running 8088MPH on an XT: https://www.youtube.com/ …