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Re: Serial port IRQ and the MCR UART register

Hello, If you look at : http://www.ti.com/lit/ds/symlink/pc16550d.pdf (not sure about the suffix) page 5 and 23, then writing a zero does set the output (1 and 2) to high (like the current comment mentions). Unfortunately while there is a hint on page 23 that DTS can be inverted, it is not written …

Re: Serial port IRQ and the MCR UART register

Thank you for your reply, Qbix. So if I get it right, you write a new mcr value of 0 : so temp_op2 = false and op2 = true. Correct. I am not sure if tri-stated means disabled (as I don't know if the OP2 in the comment is for the new op2 or the old op2, but it does seem plausible that the logic is …

Serial port IRQ and the MCR UART register

Hello All, I am opening this topic to discuss the generation of serial port related IRQ's as triggered by the OP2 bit in the MCR register. Short description: IMHO the ``tri-state logic'' in serialport.cpp around line 785 is flawed. A ``tristated'' IRQ should be disabled, while it is in fact enabled. …

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