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Re: SIV support for 386/486/586 class + Alpha CPUs and 3dfx + S3 + SiS + Matrox + XGI + old ATI + NVidia GPUs - Testing

The startup BSOD no longer happens, that's good. The MSR section still BSODs, but I'm ready to call that an emulation bug. Good, please may I have new Menu->File->Save Selected files with [msrs] deselected so I can check the changes I made such that SIV should use MSR 2A work OK? Do you plan to fix …

Re: SIV support for 386/486/586 class + Alpha CPUs and 3dfx + S3 + SiS + Matrox + XGI + old ATI + NVidia GPUs - Testing

I'm aware the cache CPUID is not implemented, but don't know why. I'm told it caused issues with some BIOSes as we don't emulate a cache. I'll ask around EDIT: Confirmed. I assume the BIOSes only run in real mode , is this correct? If so would it be sensible to implement CPUID 2 to return the …

Re: SIV support for 386/486/586 class + Alpha CPUs and 3dfx + S3 + SiS + Matrox + XGI + old ATI + NVidia GPUs - Testing

Test build BSODs on startup. I'm leaning towards it being another emulation issue not directly related to MSRs, in which case it's 100% our problem; RDMSR: Invalid MSR: 00000150 *** 3 repeats *** RDMSR: Invalid MSR: 00000611 RDMSR: Invalid MSR: 00000639 RDMSR: Invalid MSR: 00000641 RDMSR: Invalid …

Re: SIV support for 386/486/586 class + Alpha CPUs and 3dfx + S3 + SiS + Matrox + XGI + old ATI + NVidia GPUs - Testing

I just brought SIV into this because it's currently the only hardware reporting tool to actively cause BSODs with our emulation (HWiNFO used to but was mysteriously fixed). I can't comment on unnamed utilities, but know that as HWiNFO reads MSRs on W9x it must only read MSRs that exist as W9x fails …

Re: SIV support for 386/486/586 class + Alpha CPUs and 3dfx + S3 + SiS + Matrox + XGI + old ATI + NVidia GPUs - Testing

I was more concerned about SIV trying to read unimplemented MSRs and resulting in a BSOD (UNEXPECTED_KERNEL_MODE_TRAP with parameter 0x0000000D) but that's clearly an emulation issue since you do catch the GPF exceptions. The MSR implementations are WRMSR and RDMSR for P6 CPUs. Yes, stopping the …

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