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Re: SeaBIOS booting progress on 86Box!

I was working on adding support for the 440BX ports of coreboot to 86Box a long time ago, specifically for the ASUS P2B-LS and P3B-F, two motherboards which were added to the emulation roster in their original Award BIOS form with the intention of adding coreboot versions later. Running coreboot …

Re: SIV support for 386/486/586 class + Alpha CPUs and 3dfx + S3 + SiS + Matrox + XGI + old ATI + NVidia GPUs - Testing

Good, please may I have new Menu->File->Save Selected files with [msrs] deselected so I can check the changes I made such that SIV should use MSR 2A work OK? Attached. Do you plan to fix the MSRs emulation bug? I plan on doing some more tests myself - other versions of Windows, other CPUs, and real …

Re: SIV support for 386/486/586 class + Alpha CPUs and 3dfx + S3 + SiS + Matrox + XGI + old ATI + NVidia GPUs - Testing

After pondering this I decided SIV should not be trying to read these MSRs on your 86BOX system so please will you try SIV32X 5.55 Beta-01 or later. If it still triggers a BSOD do SIV32X -DBGINI > SIV_DBGOUT.log so we can see how far it gets. The startup BSOD no longer happens, that's good. The MSR …

Re: SIV support for 386/486/586 class + Alpha CPUs and 3dfx + S3 + SiS + Matrox + XGI + old ATI + NVidia GPUs - Testing

Yes, stopping the BSOD would be my top priority and suspect once you have done this many more hardware reporting programs will run. Thank you for the links, I had a look and adjusted SIV32X 5.55 Beta-00 light of what I found. Please may I have two new save files? I also added code to deduce there …

Re: SIV support for 386/486/586 class + Alpha CPUs and 3dfx + S3 + SiS + Matrox + XGI + old ATI + NVidia GPUs - Testing

When I looked some more at the save file I noticed that MSR 0000001B is returned as zero and as this is the APIC base it should never be zero. As a result of this SIV did not even try to read any of the other MSRs as it deduced the CPU was not a real CPU and therefore unlikely to return anything …

Re: SIV support for 386/486/586 class + Alpha CPUs and 3dfx + S3 + SiS + Matrox + XGI + old ATI + NVidia GPUs - Testing

Thanks for the attention. I expect the root cause of this is down to bugs in your emulator as SIV always reads MSRs within a _try{}_except(){} block. Do you need to know anything more for you to fix this? Don't really need any more information, this is being investigated, reading MSRs like this …

Re: SIV support for 386/486/586 class + Alpha CPUs and 3dfx + S3 + SiS + Matrox + XGI + old ATI + NVidia GPUs - Testing

Thank you for the report and links to the datasheet. Please try SIV 5.54 Beta-08 or later, check if SIV finds the SMBus and it works, if not post [PCI Bus] . Can you also post the two Menu->File->Save Local files as I suspect I will need to made some changes to the PCI device reporting for the …

Re: SIV support for 386/486/586 class + Alpha CPUs and 3dfx + S3 + SiS + Matrox + XGI + old ATI + NVidia GPUs - Testing

SIV (and just about any other tool) doesn't read SPD and other SMBus data from the SMSC SLC90E66, a rare southbridge that mostly mimics the PIIX4 (apparently with Intel's blessing). It has the same function layout as the PIIX4, and according to the datasheet (p. 149-154) and the Linux kernel (l. 785 …

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