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Re: Software for the IBM PC Light Pen?

So on the first clock of a scanline it needs one or two bytes buffered already (and starts loading the first byte of the next character clock) in text mode? When are those two bytes loaded exactly? What if the last clock was the clock before horizontal total (before the new scanline) and active …

Re: Software for the IBM PC Light Pen?

You're right - I mis-stated. The shift registers are loaded every character, not every byte. So while it's loading a byte from VRAM it's actually streaming out the pixels from two bytes previous. And in text modes, both character and attribute are loaded before the character starts.

Re: Software for the IBM PC Light Pen?

Since CGA 2BPP is a multiple of 4 and 1BPP is a multiple of 8, does that mean the CGA essentially reads VRAM pretty much just like a VGA does (it also loads caches 4(x2, high values unused) and 8(x4, 3 upper bytes unused?) pixels in those modes respectively)? Kind of but also not. The CGA's VRAM …

Re: Software for the IBM PC Light Pen?

Kinda like the NES Zapper. Kind of, except that if I remember correctly the NES zapper didn't actually find the position of sensor using the timing of the raster beam - it replaced the target with a white square on a black background for a frame when you pressed the trigger, and just recorded …

Re: Software for the IBM PC Light Pen?

I don't know of any other than the ones I wrote myself some years ago while playing with one I had made myself: https://github.com/reenigne/reenigne/tree/master/8088/cga/lightpen . The hardware didn't work very well, but the I think the software was correct. It should be easy to build as a .com file …

Re: CGA artefacts in unsupported modes

I'm not sure what the snow storm effect you're talking about could be, being unfamiliar with this modified CGA card. Something writing rapidly to VRAM in 80-column text mode might look like a snow storm. Or perhaps it could be the CRTC being set to values that the monitor can't sync to. I also once …

Re: UniPCemu 8088 cycle accuracy

Any idea where I can find how many cycles each CPU opcode is supposed to take? You can use XTCE-trace ( https://www.reenigne.org/software/xtce_trace.zip ) or MartyPC or the ISA bus sniffer on XTServer. I think the timings from these should almost all be the same as those from the previous version …

Re: UniPCemu 8088 cycle accuracy

Trixter wrote the speed test, not me. But I believe it just runs a particular block of code (containing many different types of instructions) and counts how many PIT cycles it took to execute. The correct value should be 1678, so a report of 1720 means that the emulated CPU is slow - taking too many …

Re: Emulating Area5150

Other than CORX, CORD and RPTS all the human-readable names in the disassembly were names I made up. The patent does mention a few other names for routines but when there was a conflict between such a name and the normal x86 assembly mnemonic I picked the latter.

Re: Emulating Area5150

Yeah, those two effects are the most timing-sensitive in the whole demo. Unless it's a cycle-exact emulation of the 8088 at 4.77MHz and the IBM CGA with its particular wait states, both driven from the same time source, they won't work.

Re: Emulating Area5150

No, it should look fine on an LCD monitor. In fact the monitor shouldn't be able to tell that there are any CRT register changes - if everything is working correctly the signal to the monitor should look like a very standard CGA signal (except for the visuals in the overscan area, on effects that do …

Re: Emulating Area5150

What I eventually found worked best for emulating the composite colour waveforms and multiplexer was to set up a table of samples indexed by current RGBI colour (4 bits), previous RGBI colour (4 bits) and phase (2 bits) for a total of 1024 entries. The I signal doesn't go through the multiplexer so …

Re: 8088 Interrupt delay timing

Yes, I think you're right about the it being more complicated than "queue_len == 3". The logic I have for it is https://github.com/reenigne/reenigne/blob/master/8088/xtce/xtce_microcode.h#LL3185 - that doesn't take into account whether the last queue operation was a read or a write (directly) but …

Re: 8088 Interrupt delay timing

Yes, the last bus transfer type does seem to be related - at least that's my best guess. But there must be some bit of state (a flip-flop somewhere) which keeps track of whether to do that extra cycle of delay during the HLT, as its output is used long after that bus transfer is complete. It being …

Re: 8088 Interrupt delay timing

I no longer think it's checking every other cycle. Here's the logic I use in my microcode-based emulator: https://github.com/reenigne/reenigne/blob/master/8088/xtce/xtce_microcode.h#LL2522 . This seems to work in my tests, but the cause is very mysterious! I asked Ken about it and he couldn't see …

Re: IBM VGA BIOS initialization

But wasn't the vertical retrace start put out-of-range for almost all but the last scanline to archieve correct vertical retrace if I remember correctly (to prevent vertical retrace from occurring each 2 scanlines)? That was what I was referring to. Although it's been a while since I was messing …

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