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Re: test386.asm CPU tester

SAR should set AF not clear it when count != 0. Looking at 8-bit SHL, you don't need the special-casing for count=0x10 and 0x18. They should both behave like count=8. OF will be set as expected, regardless of the count, so: mov al,0x40 shl al, 0x10 will still perform the shift, AL will be zero, and …

Re: test386.asm CPU tester

superfury wrote: Just fixed the auxiliary flag to set(shl/shr) or clear(sar) on maskcnt!=0. Now shr crashes because of an invalid carry flag? For SAR, auxilliary carry flag is always set for CPUs prior to Pentium 2 if count &0x1F != 0.

Re: test386.asm CPU tester

So if I understand correctly, the mask only applies to 8/16/32-bit shift/rotates, while 32-bit RCR doesn't mask and instead does modulo 33(according to test results)? Both of them mask with 0x1F, so mov eax,20 stc rcl eax,20 will do nothing - no change in value or flags. Same behaviour for RCR, but …

Re: test386.asm CPU tester

superfury wrote: Doesn't the documentation all say that 8-bit ROL/ROR mask with 0x1F, then modulo 8(which is the same as &0x7 Regardless of what the documentation says, the only mask is 0x1F. A rol al,8 will really rol al,8, and the carry will be affected.

Re: test386.asm CPU tester

Documentation says mask with 0x1F, even with 32-bit rcl/rcr? rol al,8 will modulo 8 with 8, becoming 0, thus not rotating anything, thus no carry flag modification? Or is it set to bit 0 with 8/16 shifts always? With count(s), do you mean cnt, maskcnt or numcnt in those statements? The modulo here …

Re: test386.asm CPU tester

Your 32-bit RCL/RCR have a redundant line with the numcnt assignment since maskcnt is already masked. They also should be %33 not &0x1F. Overflow should not be cleared if count==0. For SAR, overflow flag is cleared for all counts > 0. Carry is a copy of the last bit rotated, regardless of the count, …

Re: test386.asm CPU tester

The OF flag is defined only for the 1-bit rotates; So 1-bit rotates mean both CL=1/9/17, IMM8=1/9/17 and the ,1 variant? No, that's absolutely untrue. mov al,80 mov cl,2 rol al,cl will set OF. You take the xor of the top two bits before and after the rotate, and set OF accordingly. The rotate count …

Re: test386.asm CPU tester

Overflow happens as you would expect - when the top two bits differ before and after the rotate, using the same algorithm as for add, etc. It happens for all rotate counts, not just 1. Carry is set to the value of the last bit rotated (e.g. al=0x40, cl=2, rol al,cl -> carry is set).

Re: test386.asm CPU tester

Strangely enough, using a simple large file text editor doesn't show to find any div instructions when searching the log for some odd reason? Thinking about the problem, there must be a problem related to the stack somehow. The stages should be as follows(assuming no stack changes): call idivloc( …

Re: test386.asm CPU tester

@peterferrie: So, if I understand this correctly: - If opcodes 69/6B r16 decodes as AX/EAX, then it disassembles as the two-operand version. - If opcodes 69/6B r16 decodes as other registers, then it disassembles as the three-operand version. In both cases, behaviour is as the three-operand version …

Re: test386.asm CPU tester

I'm just asking to be sure: to the CPU, does a 2-operand opcode 69/6B(IMUL r16,imm8/16) even exist? Or does it always decode to 3 operands, with r/m and immediate being multiplied and stored into the reg operand? Didn't we discuss this previously? The AX register as destination parameter is …

Re: test386.asm CPU tester

The divide-by-zero test is causing some stack problem for you. 0010:0000C20C C7 04 24 14 C2 00 00 mov dword ss:[esp],0000c214 0010:0000C213 CF iretd 0010:0000C214 C3 retd 0010:00000000 74 65 je 00000067 The retd is returning to the wrong location. The expected return address is 0010:00002941.

Re: test386.asm CPU tester

This tester needs some of the corner cases. I shall make a PR for them. :-) This would be awesome! There are a lot of tests still missing... I opened an issue rather than forking the code because I haven't spent the time yet to understand how to add new tests by myself. I hope that's acceptable. It …

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