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Re: Ideas about speeding up the dynrec

Posted on 2009-10-10, 19:32

I would like an opinion on this idea: In dynrec, when memory is accessed, a function is called. This function checks if the memory address can be accessed directly or with a read/write handler and then accesses the memory using appropriate method. The idea is to call a different function. The …

Re: Ideas about speeding up the dynrec

Posted on 2009-10-07, 05:16

Code should be static bool decode_fetchb_imm(Bitu & val) { if (decode.page.index<4096) { if (decode.page.invmap != NULL) { if (decode.page.invmap[decode.page.index] == 0) { val=(Bit32u)decode_fetchb(); return false; } } HostPt tlb_addr=get_tlb_read(decode.code); if (tlb_addr) { val=(Bitu)(tlb_addr+ …

Re: Ideas about speeding up the dynrec

Posted on 2009-10-05, 21:04

It's working and I don't see any slowdown or other negative aspects. Same here, blood gets a small speedup. Do you have any games in mind (arm recompiler) that benefit from the code? I don't have any specific game in mind, but theoretically every (or most) 32-bit code should benefit from this, …

Re: Ideas about speeding up the dynrec

Posted on 2009-10-05, 05:01

That means that when a code block is translated for the first time, the immediate value is encoded in the translated code. When the SMC changes the immediate value, the code block is translated again, but this time the immediate value is read from original instruction stream. The code is ok as well …

Ideas about speeding up the dynrec

Posted on 2009-10-04, 09:10

Hi, I have some ideas about speeding up the dynrec (both old (x86) and new (non-x86)). Idea 1: When translating the instruction stream and the maximum number of instructions is reached, the code block is closed and exited. The idea is to link the block to the following block (something like when …

Re: ARM (Thumb) Dynamic Core Code

Posted on 2009-05-09, 07:32

I missed that. So, one fix woud be to use function gen_mov_byte_to_reg_low_imm_canuseword instead of gen_mov_byte_to_reg_low_imm (and MOV_REG_BYTE_TO_HOST_REG_LOW_CANUSEWORD instead of MOV_REG_BYTE_TO_HOST_REG_LOW). On x86, another fix would be to switch FC_ADDR (ebx) and TEMP_REG_DRC (esi). On x64 …

Re: ARM (Thumb) Dynamic Core Code

Posted on 2009-05-08, 17:36

If you mean the change in step 3 (in files decoder_opcodes.h and operators.h), that was becuse FC_RETOP was used to hold the value of the 3rd parameter. And this was a problem if FC_RETOP and FC_OP1 were the same register (FC_OP1 is the 1st parameter and FC_OP2 the 2nd parameter). I checked the …

Re: ARM (Thumb) Dynamic Core Code

Posted on 2008-09-12, 19:30

Well, not that rare if you count the emulated instructions that acccess memory using those registers, instructions which use the registers implicitly and in case of ESP instructions that manipulate stack - push, pop, etc. But like you said, it doesn't matter at the moment.

Re: ARM (Thumb) Dynamic Core Code

Posted on 2008-09-12, 19:10

Sorry, my mistake. Actually I was considering your idea. One problem is, which registers to map onto host registers - my top choices were EAX, ESP and EBP. Another problem is, that whenever the registers are used outside the recompiled code, they have to be stored back to memory in case of reading …

Re: ARM (Thumb) Dynamic Core Code

Posted on 2008-09-12, 18:08

x86 has two free registers - edi and ebp - both are preserved across calls. But x86 also has the original dynamic recompiler, which I think is faster than this one, so I see no need to optimize this one (but don't let it stop you). x64 has more free registers - some are preserved accross calls, some …

Re: ARM (Thumb) Dynamic Core Code

Posted on 2008-09-12, 17:50

Ok it looked like you'd use something like crazyc to use a bunch of registers for the emulated registers. Don't know if it'd be better to go that way. The files you've uploaded seem fine nevertheless. Well, ARM doesn't have enough free registers to hold the emulated registers, so I think what I did …

Re: ARM (Thumb) Dynamic Core Code

Posted on 2008-09-12, 16:53

Thanks (what an awful load of changes to check ;) ), but it seems to lack some parts. Like the function dyn_pop_seg(Bit8u seg) can change the value of the segment register (the recompiler does NOT emit a block finish on that function) but it is not reflected into the chache hostreg you are using. …

Re: ARM (Thumb) Dynamic Core Code

Posted on 2008-09-11, 19:55

I implemented the ideas and the result (and some explanation) can be seen on this page: http://members.chello.sk/apauer/dosbox5/dosbox5.html I changed the recompiler to bring more speed to the ARM backend - the other backends should be working exactly as before. Hopefully it can be integrated into …

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