Re: Testing and fixing UniPCemu's CPU and UniPCemu progress

Posted on Yesterday, 10:08

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by superfury

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Managed to fix one other bug exposed by SDL3 (SDL2 somehow doesn't seem to show the bug). There was an issue with multithreaded pointer registration and release that caused the memory allocations for disk write file structure allocations to fail, causing the disk write to fail, for example when an …

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Re: Testing and fixing UniPCemu's CPU and UniPCemu progress

Posted on 2024-04-24, 19:36

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by superfury

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OK. With the latest interrupt bugfixes and other CPU improvements (things like improved B-bit handling and D-bit based protected mode handling from the source segment of interrupts, faults and far jump/call/ret and iret instructions) Windows 95 goes wrong during any boot it seems? It's trying to …

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Re: Testing and fixing UniPCemu's CPU and UniPCemu progress

Posted on 2024-04-23, 11:29

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by superfury

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Managed to fix an issue in the new SDL3 port of the common emulator framework. So now sound works properly again on SDL3. Also went and fixed some issues in sound device connection/disconnection on SDL2/3.

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Re: Testing and fixing UniPCemu's CPU and UniPCemu progress

Posted on 2024-04-22, 02:37

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by superfury

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Just fixed a i82347 bug where the NMIMASK register was set to mask the wrong causes and could cause an NMI in various cases (due to swapping reset state of register C3h and C4h (register C4h set to 84h and C3h set to 00h). They're now properly set to 84h(for register C3h) and 3Eh(for register C4h). …

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x86 Trap Flag during IRET in VME?

Posted on 2024-04-21, 22:35

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by superfury

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What is the real behaviour of the trap flag during IRET in VME mode? When the trap flag is set during a Virtual 8086 mode 16-bit IRET instruction (by the value popped into the FLAGS register's 13 bits (IOPL, Interrupt flag(popped into VIF instead) (and Virtual 8086 mode flag as well, but isn't …

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Re: x86 NT(Nested Task) flag vs VM flag?

Posted on 2024-04-21, 21:46

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by superfury

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So, if the NT flag is essentially unsupported in V86 mode(only being cleared/set during task switches, but having no effect on IRET), is it affected by task switches to V86 tasks? So a CALL to a V86 task, will that set the NT flag of said task? Will it have effect on the V86 task(besides it being …

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Re: Testing and fixing UniPCemu's CPU and UniPCemu progress

Posted on 2024-04-21, 01:26

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by superfury

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OK. APM probably works fine I think. I noticed something odd when running an already installed Windows 95 OSR 2.5 from earlier builds. It booted up fine. Then once clicking the start menu it kept BSOD-ing at C000E975 (not sure about that first part tho, so more like CxxxE975). So I put up a …

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Re: Testing and fixing UniPCemu's CPU and UniPCemu progress

Posted on 2024-04-19, 07:18

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by superfury

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Oh great. Now with the latest changes, Windows 95 OSR 2.5's first boot fails: Windows Protection Error while initializing device CONFIGMG. Didn't get that error code before I think? Perhaps APM-related?

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Re: Can 32-bit x86 programs explicitly use IP?

Posted on 2024-04-18, 12:50

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by superfury

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Slightly related, since it applies to EIP or IP: What is the return point of a interrupt handling throwing a fault (for example #GP) during an INT instruction itself (opcode CDh)? UniPCemu currently treats all faults the same (resetting EIP to the start of the instruction), but is the same true for …

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Re: Testing and fixing UniPCemu's CPU and UniPCemu progress

Posted on 2024-04-18, 12:43

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by superfury

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Just found a tiny issue with the LEAVE instruction that caused paging TLB loads on the stack reads not to continue the instruction with the proper ESP register state if the stack pop caused a TLB load to require locking the bus (which TLB loads always do, unless the bus is already locked and owned …

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Re: Testing and fixing UniPCemu's CPU and UniPCemu progress

Posted on 2024-04-17, 16:04

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by superfury

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Hmmm... Running WFW 3.11 in 386 enhanced mode crashes PROGMAN. But running Windows 3.11 in Standard mode doesn't crash it? Although it can't install because it's seemingly trying to run the installer in MS-DOS mode when it's run on Windows 3.1 in 386 enhanced mode? Edit: Just found out that although …

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Re: Testing and fixing UniPCemu's CPU and UniPCemu progress

Posted on 2024-04-14, 15:35

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by superfury

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Fixed 32-bit operand size for far calls. Also implemented changed D/B-bit checks according to Bochs's (E)SP and (E)IP behaviour. Also fixed 32-bit far calls to behave properly again, when not through call gates. (E)IP itself doesn't seem to have issues anymore on 80386+, but Windows 95 OSR 2.5 "C" …

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Re: Emulating Area5150

Posted on 2024-04-14, 02:13

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by superfury

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Perhaps a bit related to the whole 8088 accuracy one. Just found this description of pretty much all 808x microcoded (undocumented/missing) opcodes and their behaviour: https://www.righto.com/2023/07/undocumented-8086-instructions.html Might be interesting to implement one day? I have some already …

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Re: Testing and fixing UniPCemu's CPU and UniPCemu progress

Posted on 2024-04-13, 13:25

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by superfury

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OK. With the latest improvements to the 32-bit TSS IOPB's limit range checks, I see something interesting happening during phase 2 of the Windows 9x setup: "An exception 0E has occurred at 0028:c0007292 in Vxd ---. This was called from 0028:C10555BC in VxD ---. It may be possible to continue …

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Re: x86 IO permission bitmap?

Posted on 2024-04-13, 11:08

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by superfury

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The IOPB was introduced with the 386. What older processors would be supported by disabling it? Oh, my bad. You're right about that. I am wondering about the Interrupt Redirection bitmap in this case. What happens if IOPB's value minus 32 reaches the IOPB offsets(it's 2 bytes after all) or below? …

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Re: x86 IO permission bitmap?

Posted on 2024-04-13, 10:52

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by superfury

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Ah. You're right about that. And the related bitmap below it can be disabled by clearing CR4's bit on Pentium-compatible processors (CR4.VME). So it's actually compatible with the 80386 and below (16-bit (286) TSS have neither, so they assume it's bits are set and interrupts trapping I think (like …

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x86 IO permission bitmap?

Posted on 2024-04-12, 21:40

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by superfury

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Can the I/O permission bitmap be disabled for operating systems not supporting it? I know that the CPU can disable it by making it map out-of-range (base TSS offset out of range) of the TSS segment limits, as well as with mapping the base offset register out-of-range (by lowering the limit field to …

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Re: Testing and fixing UniPCemu's CPU and UniPCemu progress

Posted on 2024-04-11, 21:59

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by superfury

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OK. Some more testing using testsuites and double checking using the Bochs source code as proper documentation (the 80386 manuals don't seem to fully specify the RETF (E)SP behaviour for example, nor how the immediate value if used affects it during and after the protected mode logic). It appears …

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Re: Testing and fixing UniPCemu's CPU and UniPCemu progress

Posted on 2024-04-11, 16:46

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by superfury

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OK. Somehow it seems to crash within protected mode segment 868h when loading some diagnostics software from the Hiren's BootCD 7.8 CD-ROM (which I use for diagnostics CPU purposes)? Edit: It seems to somehow be getting into some infinite loop? debugger_codegoingwrong_UniPCemu_segment868_20240411_ …

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Re: Testing and fixing UniPCemu's CPU and UniPCemu progress

Posted on 2024-04-11, 14:28

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by superfury

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Just found another undocumented 80386+ feature: https://www.os2museum.com/wp/sgdtsidt-fiction-and-reality/ Apparently, 80386+ SGDT/SIDT actually store the top 8 bits of the descriptor (the highest 8 bits of the base address), instead of zeroing it with 16-bit opcode size (what UniPCemu performed up …

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