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Re: Common log format

Posted on 2017-10-26, 18:47

Got a good point there about showing all registers, they have values after all(initialized to zeroes by default/reset). Although real mode can't use some of them(LDTR, TR). Forgot about FS/GS: You're right about those.

Re: Common log format

Posted on 2017-10-26, 16:30

This is what I currently use with UniPCemu(it logs all registers as well as some extra state info such as HLT and reset(first instruction after the CPU has been reset) status): OPTINLINE char decodeHLTreset(byte halted,byte isreset) { if (halted) { return 'H'; //We're halted! } else if (isreset) { …

Re: Common log format

Posted on 2017-10-26, 08:44

I'm just thinking, shouldn't we add some kind of register dump/memory accesses to the logs? That way we can see exactly what goes wrong when executing instruction, instead of just execution path? UniPCemu can already log those, but it's currently disabled for the common log format(since we haven't …

Re: test386.asm CPU tester

Posted on 2017-10-24, 19:45

You say a mov to [ESP], but according to https://pdos.csail.mit.edu/6.828/2016/readings/i386/s17_02.htm that doesn't exist? My emulator also uses 0 instead of ESP when addressed that way(base only, index still uses esp). Look at https://bitbucket.org/superfury/unipcemu/src/ …

Re: test386.asm CPU tester

Posted on 2017-10-23, 18:33

The list file is unchanging, though(only if source code is changed in the testsuite, which is only the base constants and the additional logging code): Filename test386.lst.zip File size 63.42 KiB Downloads 60 downloads File comment LST file of the executable I'm using.

Re: test386.asm CPU tester

Posted on 2017-10-23, 15:20

Strange: I only see UniPCemu emitting one 32-bit DIV instruction, which isn't overflowing or divide by 0? 0x245af920e27415a5 / 0x88776655 = 0x44332211 remainder 0. After the final IMUL32 D entry, it ends up at a interrupt-disabled HLT instruction? No DIV instruction is executed at all. test386_ …

Re: test386.asm CPU tester

Posted on 2017-10-22, 23:48

Looking at the 0xEE output, the last line starts with "IMUL32 D EAX=FFFFFFFF EDX=FFFFFFFF PS=0000", which only appears once in the reference file. So the problem happens after returning from logging, but before the "DIVDL B EAX=00000000 EDX=00000000 PS=0000 #DE EAX=00000000 EDX=00000000 PS=0000" …

Re: test386.asm CPU tester

Posted on 2017-10-22, 23:16

Looking at the debugger, the CPU seems to be idling during a JNZ rel32 instruction. Why? Because the BIU and EU are infinitely waiting for each other: The BIU Prefetch waits for the EU to load the TLB entry for the current byte address to continue fetching. The EU on the other hand, refuses to read …

Re: test386.asm CPU tester

Posted on 2017-10-22, 21:03

Just pulled the latest changes: the lea tests(post E) seems to fail now? It didn't crash on the last build(ran within 0xEE before the latest commits)? Filename test386.zip File size 69.61 KiB Downloads 58 downloads File comment lst and bin file

Re: test386.asm CPU tester

Posted on 2017-10-22, 18:11

Some simple Port E9 hack support(untested, but compiling with current masm): ; Port E9 hack support, with autodetection push eax ;Backup for autodetection in al, 0xE9 cmp al, 0xE9 jnz .noE9hack pop eax ; Restore register out 0xE9, al jmp .finishE9hack .noE9hack: pop eax ; Restore register . …

Re: test386.asm CPU tester

Posted on 2017-10-22, 17:29

This is POST EE currently executing(hanging?), possible invalid code: Filename debugger_UniPCemu_20171022_1757.zip File size 148.58 KiB Downloads 61 downloads File comment POST EE executing unknown code? Can anyone see what's going wrong? I can't seem to find the executed code anywhere in the asm …

Re: test386.asm CPU tester

Posted on 2017-10-22, 16:32

One thing to note about UniPCemu's port E9 hack: Bochs seems to print to it's console every single byte written to that port, while UniPCemu only logs a line after it receives any line ending character(either CR, LF or CRLF or LFCR. Repeating any of those causes multiple newlines accordingly, …

Re: Common log format

Posted on 2017-10-22, 00:13

Simply a flag that indicates an intruction is finished instead of 1 cycle to spend(which during cycle accurate CPU emulation is usually a constant 1(cycle spent by the BIU)). Since it's only 1 when a instruction retires(the debugger can step/log the completed instruction in my emulator, I assume …

Re: Common log format

Posted on 2017-10-21, 12:00

I've just added a simple option to use IPS(Instructions per Second) clocking instead of the cycle-accurate clock. It should make it easier to compare between the emulators, since cycle-accurate clocking will have the effect of using completely different execution paths, depending on various cycle …

Re: test386.asm CPU tester

Posted on 2017-10-20, 20:05

I've managed to fix those bugs. Now it's continuing to the 0xEE tests, which fails somewhere in there(quite a big block of code to find a single bug?). A direct COM/LPT to log output isn't supported, but the Bochs 0xE9 hack port is available? The E9 port+EA port extensions can be used to control …

Re: test386.asm CPU tester

Posted on 2017-10-20, 11:27

This is what happens with the POST 10h part(full log of all memory and registers in the old format(the common log format doesn't have any of those yet)): debugger.log Edit: Looking at the debugger, somehow ES is cleared after loading it with selector 0x18(16-bit protected mode segment with 1MB limit …

Re: Common log format

Posted on 2017-10-20, 11:14

I'll have to make a little full log on this one, since I can't see if the registers are being loaded/moved correctly in this case(maybe wrong pointers or exchange etc. is occurring, which doesn't show up in the common log format(yet)).

Re: Common log format

Posted on 2017-10-19, 22:17

Prefixes cannot be seperate instructions? If they are and an interrupt happens between them, the already loaded prefixes will be lost(due to invalid (E)IP return point)? Edit: I'm also wondering: should we implement a simple Dosbox-style execution logic(which updates hardware at instruction level( …

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