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Re: i430fx motherboard emulation issues?

Posted on 2020-10-31, 17:42

Just found a bug in the APIC interrupt handling when the CPU is in HLT state. When it's in HLT state, the APIC would see that the 8259 has raised it's INTR line. When it would accept it(which happens in the HLT handler), it would move said interrupt handler to it's special interrupt pending variable …

Re: i430fx motherboard emulation issues?

Posted on 2020-10-29, 13:27

Just noticed that both Bochs and UniPCemu has its errors with the I/O APIC window register. Bochs doesn't mask it at all(full 32-bits), while masking the address for the window/address register to 8-bits. While actually, the address register should be 32-bits wide (and writable) with only 8-bits …

Re: i430fx motherboard emulation issues?

Posted on 2020-10-28, 18:48

Just implemented the APIC ID (both logical(not the IO APIC) and physical) and it's handling of the various types(3-bit value in the request). The NMI is now also handled, as is the lowest priority(currently aliases to the normal interupt vector method). Only SMI, SIPI and extInt isn't implemented …

Re: i430fx motherboard emulation issues?

Posted on 2020-10-28, 12:33

For now, I've added a shadow register IRR for the APIC, which is cleared when the APIC is disabled or enabled. Said shadow register is set when a IR is masked and it's raised(in edge mode). It's sent to the IRR for starting the IRQ when the IRQ is unmasked(clearing said shadow register bit as well). …

Re: i430fx motherboard emulation issues?

Posted on 2020-10-28, 10:11

OK. How are IRQs detected on a APIC? For e.g. IRR 0 etc? Are IRQs kept pending when masked in the I/O APIC? So are they send when raised while masked and unmasked afterwards? Or does the mask ignore any monitoring of the IR lines? Edit: Bochs seems to imply that IRR is set pending until unmasked, …

Re: i430fx motherboard emulation issues?

Posted on 2020-10-27, 20:27

Does Windows NT require the APIC high precision timer to be functional to boot? Edit: Just tried Debian Jessie(8.11.1). It seems to enable most IRQs on the APIC. But it asks to press enter or space for selecting a video mode(mode 314 isn't supported on the ET4000AX?). But it can't receive it, since …

Re: i430fx motherboard emulation issues?

Posted on 2020-10-27, 02:18

Just implemented a 8-bit version of the 86box's Intel flash ROM. That seems to at least fix the ESCD updating. :D Edit: Added to that most of the MultiProcessor specification(although with only 1 processor installed). The only thing that isn't compatible yet is the NMI, which is still routed in it's …

Re: i430fx motherboard emulation issues?

Posted on 2020-10-26, 21:51

Weirdly enough, Windows NT 4.0 only seems to enable the IRQ8 handler on the APIC? There are various other IRQ handlers that actually try to fire, but are masked off? Bit 16 of all other IRQ registers on the I/O APIC is set? So it's masking all other IRQs off for some weird reason? All that weird …

Re: i430fx motherboard emulation issues?

Posted on 2020-10-26, 04:46

After implementing the APIC registers and it's read-only registers(the LAPIC writable registers being fully writable atm), Windows NT 4.0 tries to disable the PIC(setting the mask registers to 0xFF) and use the APIC/LAPIC instead. But since the APIC doesn't have anything emulated yet, it will hang …

Re: i430fx motherboard emulation issues?

Posted on 2020-10-23, 20:12

I now seem to have some kind of issue with the loading/setting of the Intel 8254 PIT? It doesn't seem to like the values it's returning after writing them for some reason? First it writes FF, latches it(which might have been decreased by a PIT clock), compares it with FF, then it will either error …

Re: i430fx motherboard emulation issues?

Posted on 2020-10-23, 16:03

After fixing some more issues(mainly CPU speed issues, where the CPU was too slow, being unable to keep the PIT counter the same during a write-latch test, causing the BIOS to hang itself up because it's thinking that the PIT isn't working properly), it seems to manage to POST some futher. Now I see …

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