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Re: IPX over serial packet encapsulation?

Posted on 2021-08-11, 11:18

Just implemented the IPXCP packets as well, although without valid options yet(the list of options is commented out for later implementation) and without proper nak/reject packets being sent yet(still TODO). Although it's still unknown if I need to implement at least the PAP protocol? Can it also …

Re: IPX over serial packet encapsulation?

Posted on 2021-08-11, 08:00

Just implemented the missing LCP Echo-Request to give a proper Echo-Reply(if the Magic-number option (also added) is set for the Opened LCP connection). Also fixed some bugs regarding cleanup of dynamically allocated buffers (for the LCP Configure-Request).

Re: IPX over serial packet encapsulation?

Posted on 2021-08-10, 22:16

Just finished implementing PPP with the LCP protocol (although with minimal options, the only valid options being the compression settings). So it should at least be able to open and close it now, together with the various Ack and Nac results being sent back as far as I can understand the …

Re: Getting UniPCemu up and running

Posted on 2021-08-09, 13:08

Hi Vlad, welcome! I had a feeling you might show up :D Thanks! I'm happy to help when I can :-) The Linux folks were probably familiar with the BogoMIPS term already, but not everyone is on Linux. I find that many times reading the actual source code is the best way to remove guesswork. But in …

Re: IPX over serial packet encapsulation?

Posted on 2021-08-08, 15:34

Hmmm.... Does anyone know how to calculate the PPP HDLC CRC? Is it calculated over the entire frame (minus frame delimiters(0x7D))? Or is it just calculated over the info field (the payload)? Edit: Nvm. Found out how to calculate it. It seems to be calculated much the same way as a normal 32-bit CRC …

IPX over serial packet encapsulation?

Posted on 2021-08-08, 11:13

Anyone knows how to easily encapsulate IPX over a serial line connection? Would a simple SLIP-to-ethernet(to/from ethernet protocol 8137h) decapsulation be enough(Already implemented this way in UniPCemu's server builds)? Or is PPP really required for this? What do MS-DOS games use for this, using a …

Re: Getting UniPCemu up and running

Posted on 2021-08-07, 10:20

Or does that mean that kernel requires at least one loop per microsecond to properly work and delay? So that would need to be a speed of at least 3MIPS(where it should reach 1 bogoMIPS) with those 3 instructions in the loop being exactly 1us? Hi :-) I'm the Tilck guy. So, with the newest patch the …

Re: Getting UniPCemu up and running

Posted on 2021-08-06, 20:48

Yes the bug could happen on real hardware too, provided it's slow enough. Here's some of the variable values. These were gathered running the patched version of Tilck (probably doesn't matter whether patched or not, at least the __bogo_loops is the same as before the patch). TIMER_HZ is 100 __tick_ …

Re: Getting UniPCemu up and running

Posted on 2021-08-06, 12:56

The actual value was something like 0.8, it just got truncated to zero (for a longer explanation, see Tilck issue #74 ). In SETTINGS.INI I have clockingmode=1 and cpuspeed=2400. Tilck currently needs P2, so cpu must be set to 7. Looking again at the explanation of how it's calculated, the same …

Re: Getting UniPCemu up and running

Posted on 2021-08-06, 06:48

About the 0 bogomips... At what speed is the emulated CPU running? (Default is 3 MIPS on 386+, which is slightly faster than a 286@12MHz and Dosbox/Bochs default as well afaik) Also, 0 bogomips is weird? Even a 8088@4.77MHz should be at least 0.019 BogoMIPS?

Re: Getting UniPCemu up and running

Posted on 2021-07-31, 07:40

Just calculated it at 16.7kHz,it's at least 60us delay(depending on the CPU clock relative to the 16.7kHz signal) that would be required at least if doing the same approach. Otherwise, it's a combination of polling port 64h for bits 0 or 1(depending on if it's for a read(while bit 0 cleared) or …

Re: Getting UniPCemu up and running

Posted on 2021-07-30, 19:51

Commit 65ffa33f seems fine also (similar behavior to e5c540ef). About that i8042 "hang" this code clip from Tilck's modules/kb8042/generic_x86/i8042.c may be illuminating: static NO_INLINE void i8042_io_wait(void) { if (in_hypervisor()) return; delay_us(1); } So no, I wouldn't say it's that weird …

Re: Getting UniPCemu up and running

Posted on 2021-07-30, 12:05

I've just been thinking... Does the same regarding TR vs CPL vs DPL vs RPL (TR privilege level handling) also apply to the LDTR? When looking at the LLDT instruction, it looks much like the LTR instruction, minus the busy bit of the descriptor(which doesn't exist for the LDTR)? Edit: It l00ks like …

Re: Getting UniPCemu up and running

Posted on 2021-07-30, 11:31

Thanks! Yes seems OK now :D Using UniPCemu-git-e5c540ef and Tilck-git-18381962, Tilck now manages to boot until it hangs at kb8042 kernel module. There are some in_hypervisor() calls in Tilck that would need to be patched to get it to boot all the way, so that hang is expected behavior. The kernel …

Re: Getting UniPCemu up and running

Posted on 2021-07-30, 08:52

UniPCemu still #TS faults when task switching without LTR successfully having executed first after INIT/RESET was asserted. Would that be correct behaviour? Or should it ignore the outgoing task state entirely? Or some other behaviour is required? Bochs&Dosbox don't seem to check the outgoing task …

Re: Getting UniPCemu up and running

Posted on 2021-07-29, 18:21

I've just changed LTR and task switching (just before the committing of the destination task's TSS, which also sets the B-bit in the descriptor cache and RAM) and loads the descriptor into the descriptor cache during that step. When performing checks like descriptor type etc. inside getsegment_seg, …

Re: Getting UniPCemu up and running

Posted on 2021-07-29, 08:32

Hi again! Here's some results from Tilck testing (with Bochs BIOS). UniPCemu actually manages to boot this a little bit further than PCem/86Box, but ultimately the boot sequence ends up in a kernel panic, with an error message adorned with #TS and #GP . That the #TS exception is there means it's …

Re: UniPCemu Windows 95/NT progress and issues

Posted on 2021-07-12, 11:22

Just modified the i430fx/i440fx to set the INIT pin instead of the RESET pin when performing a soft reset when not through the hard reset register in the i430fx/i440fx PCI configuration space and register selection. So it will have a slightly different effect when getting a shutdown/8042/PPI reset, …

Re: Getting UniPCemu up and running

Posted on 2021-07-11, 20:28

Thanks! Yes that's actually what I meant: Isn't the PCI configuration space the responsibility of the 440FX motherboard? It's possible that I just don't know enough about PCI (so for me it would be interesting to see how this SeaBIOS log would look like in a real physical hw that has only PCI), but …

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