Re: Evolution of a Socket3 System to a POD @100MHz

Posted on 2019-12-01, 19:14

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by PC-Engineer

in Marvin \ System Specs

in Marvin \ System Specs

So all 486 chips work with SCSI VLB when the WB jumper is set? Or you didn't have to set the WB jumper on the SCSI card for the system to work properly? I got a 2842 A and and replaced the 2842VL. The Jumper of the 2842A was allways set. Do you have any indication that the jumper has a negative …

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Re: Evolution of a Socket3 System to a POD @100MHz

Posted on 2019-12-01, 15:08

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by PC-Engineer

in Marvin \ System Specs

in Marvin \ System Specs

Seems, that my diagram suggest a ranking. It is difficult to reed between the lines. The intention was to list the absolute results for direct compairison of individual values from other users. I am not a fan of synthetic results like NU or Speedsys too, but many users ask for the results, so i …

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Re: Evolution of a Socket3 System to a POD @100MHz

Posted on 2019-12-01, 11:47

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by PC-Engineer

in Marvin \ System Specs

in Marvin \ System Specs

Since I had already taken apart the computer anyway, i tested the SV2GX4 as a VLB-High-End-Board with the Socket3-High-End-CPUs. :happy: System: Board: ASUS SV2GX4 - 1024kB cache (WB, dirty ok) RAM: 2x 8MB FPM 60ns Graphics: Miro Crystal 20SD 2MB (S3 864) HDD: Seagate ST32122A (IDE) an Prime 2 ISA …

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Re: Evolution of a Socket3 System to a POD @100MHz

Posted on 2019-12-01, 10:34

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by PC-Engineer

in Marvin \ System Specs

in Marvin \ System Specs

Last week i was grounded by the family, but better late than never ... Here are the results with 256kB cache benchmarks cache 256k POD83.JPG As you can remember the results with 1024kB cache benchmarks cache POD83.JPG This is a completely different picture dependent on cache size, in qualitative …

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Re: Evolution of a Socket3 System to a POD @100MHz

Posted on 2019-11-23, 23:23

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by PC-Engineer

in Marvin \ System Specs

in Marvin \ System Specs

@feipoa I decided to open my computer and disassemble it - the curiosity was just too big. :wink: I took your BIOS and changed the cache to 256kB (8x 32k8 + 32k8 tag). 1. I measured with my BIOS with L2 WT and L2 WB (without dirty) - no HW hack 2. Changed the BIOS to yours and measured with L2 WB ( …

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Re: Evolution of a Socket3 System to a POD @100MHz

Posted on 2019-11-22, 12:13

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by PC-Engineer

in Marvin \ System Specs

in Marvin \ System Specs

@feiopa and GigAHerZ Thank you both for the elaboration of setting the correct bit in the chipset for dirty tag. So it seems there is no need to disassemble my dirty tag anymore to test the sis.exe :happy: Keeps this bit saved in BIOS configuration after reboot (soft- and hard-)? ...Since my LCD …

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Re: MIRO Crystal 20SD VL BIOS

Posted on 2019-11-22, 06:45

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by PC-Engineer

in Marvin \ Video

in Marvin \ Video

No, at least the VLB version is only available in with Vision864 and i think the PCI Version too. But there are two PCB versions of the VLB version, the older with AT&T DAC and the newer one with S3 DAC. I have the older one - will see what happens ... 😉

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Re: Evolution of a Socket3 System to a POD @100MHz

Posted on 2019-11-22, 06:38

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by PC-Engineer

in Marvin \ System Specs

in Marvin \ System Specs

I understand your issues with your graphics card. Does this problem persists even with the clock at 33MHz? Will test my other two VLB cards the next days and their behavior in transparent mode. Do you can run Second Reality with your Mach64 in transparent mode? I have the older version of 2840VL, …

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Re: Evolution of a Socket3 System to a POD @100MHz

Posted on 2019-11-21, 21:59

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by PC-Engineer

in Marvin \ System Specs

in Marvin \ System Specs

The STB Lightspeed and Miro 20SD run both well in transparent mode....33MHz VLB Speed... I meant the VLB graphics cards run at 40 MHz along with the VLB SCSI adapter present. Does Transparent still work? Yes it works, but only, if the SCSI Controller is plugged into the VLB port near the CPU. This …

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Re: MIRO Crystal 20SD VL BIOS

Posted on 2019-11-21, 21:04

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by PC-Engineer

in Marvin \ Video

in Marvin \ Video

Very nice, thanks a lot!!! Will try it on the weekend 😀

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Re: Evolution of a Socket3 System to a POD @100MHz

Posted on 2019-11-20, 16:54

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by PC-Engineer

in Marvin \ System Specs

in Marvin \ System Specs

I thought that it's no longer a 486 anymore now its a Pentium and I have a bunch of Pentiums already. :neutral: Yes, youre right, its no 486 anymore. In the beginning of this project it shold get a typical 486 with VLB, but as i found out, that my Pentium Overdrive was able to run with 100MHz i …

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Re: Most powerful 1999 motherboard?

Posted on 2019-11-19, 16:27

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by PC-Engineer

in Marvin \ General Old Hardware

in Marvin \ General Old Hardware

Intel OR840 or similar with Dual CPU, 133MHz FSB, AGP 4x and Dual Rambus.

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Re: Evolution of a Socket3 System to a POD @100MHz

Posted on 2019-11-19, 13:52

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by PC-Engineer

in Marvin \ System Specs

in Marvin \ System Specs

Isn't the dirty bit actually fundamental to the operation of WB L2 cache? Yes! And it has a relatively huge performance impact. This is why i cannot understnd, that many boards don't supoort dirty tag correct. Without it, can you even call it writeback mode? You can! But there is no performance …

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Re: Intel Thor: my DOS/WfWG3.11 machine

Posted on 2019-11-19, 13:44

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by PC-Engineer

in Marvin \ System Specs

in Marvin \ System Specs

I like your compilation. Especially the genuine intel mainboard (with the Triton FX and the integrated S3 graphics) paired with the Pentium 133. And the board himself is a nearly unique component. Very nice! Interessed on your progress with this computer!

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Re: MIRO Crystal 20SD VL BIOS

Posted on 2019-11-17, 20:18

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by PC-Engineer

in Marvin \ Video

in Marvin \ Video

pushing up ... Is there someone, who can take me a BIOS dump from his/her Miro Crystal 20SD VL? Thanks a lot in advance and best regards!

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Re: Evolution of a Socket3 System to a POD @100MHz

Posted on 2019-11-17, 10:33

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by PC-Engineer

in Marvin \ System Specs

in Marvin \ System Specs

For 256kb and 512kB cache u use a 32k8 tag-cache in DIP28 housing, for 1024kB cache you use a tag cache in DIP32 housing. The dirty tag is an additional bit to the tag, so you can use the tag cache as a host for the dirty tag. Therefor yo use all signals and pins from the tag cache - except the pins …

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Re: Evolution of a Socket3 System to a POD @100MHz

Posted on 2019-11-15, 15:20

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by PC-Engineer

in Marvin \ System Specs

in Marvin \ System Specs

Hope you get a lot of fun out of this machine. Yes, planing to play Tie-Fighter SVGA in christmas holidays :happy: And thanks, but the Cable manaement looks better than it is ... While I understand why you wanted a true 50Mhz CPU after all these years DX2/66 VLB IS what a 486 is to many. Problem is …

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Re: Evolution of a Socket3 System to a POD @100MHz

Posted on 2019-11-15, 06:44

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by PC-Engineer

in Marvin \ System Specs

in Marvin \ System Specs

My POD100 systems is quite a bit slower than this (Doom 53fps, Quake 22.8fps). That's with the pretty much same VGA (Hercules brand ET4000 w32p). The cache and motherboard features (transparent mode) seems to be making a difference. Makes sense, a upgrade from 256kB to 1024kB gives appr. 5%, and …

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Re: Evolution of a Socket3 System to a POD @100MHz

Posted on 2019-11-14, 22:40

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by PC-Engineer

in Marvin \ System Specs

in Marvin \ System Specs

Final Words The route is the goal. This project took in sum one year time and I made several experiences of my childhood history again – great. Now I have a system with appr. Pentium 90 Performance in a 486 platform to the price of multiple P90 systems – no problem. This system includes nearly all …

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Re: Evolution of a Socket3 System to a POD @100MHz

Posted on 2019-11-14, 22:37

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by PC-Engineer

in Marvin \ System Specs

in Marvin \ System Specs

I am sure, some of you are interested in the performance of the POD @100MHz in other late 486 Mainboards with fast chipsets (SIS and UMC). To make it comparable I took only boards with 1024kB cache and L1 WB support, used a Miro Crystal 20SD PCI 2MB similar to the VLB version, and I used the same …

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