Re: Voodoo 2 4444SX
Posted on 2024-01-12, 14:31
Next step is to implement part of the FBI<->RAMDAC communication (not video data) and clock generation in the FPGA. The FBIs need to read and write quite a couple of registers to configure the VIDCLK and MEMCLK. The FBI doesn't talk to the RAMDAC at all during system start-up, only when an …