I just saw this commit: https://bitbucket.org/pcem_emulator/pcem/comm … d11056702919eee .
Are we sure this is the right solution? It looks to me like this is a hack to get around the problem I pointed out, thought I need to look at the RTL8029AS specification for this.
Edit: Here's the quote from the RTL8029AS datasheet:
All bits correspond to the bits in the ISR register. POWER UP=all 0s. Setting individual bits will enable the
Are we sure the current implemenetation of the IMR is even remotely correct? IIRC this was originally ported from DOSBox and I have no idea whether or not the implementation there is correct. From how I interpret this, a bit from IMR, when set, makes the card issue that type of interrupt. If it's clear, such an interrupt is not issued.
Edit #2: Seems I misunderstood the code. What the code does is, checks if any unmasked interrupts are currently pending and raises the interrupt if yes, otherwise it lowers the interrupt. This is OK. However, my point about the implementation of level-sensitive interrupts still stands - it *IS* going to prevent all other interrupts from being processed, causing Windows 9x to triple fault reset when someone attempts a large download over the network.