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Cyrix appreciation thread

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Reply 80 of 386, by F2bnp

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feipoa wrote:
sliderider wrote:

Why do you think the government is so afraid of an EMF pulse being used as a weapon? It would disable all electronic devices in the country.

Did you recently watch Golden Eye (James Bond)?

🤣 🤣 🤣

Can't stop laughing! It's amazing how much Sliderider can derail a thread with a single post. 🤣

Reply 81 of 386, by feipoa

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The topic has gotten quite derailed. It seems nobody takes Cyrix appreciation very seriously. Perhaps the subject like should read Cyrix Fun Thread instead of Cyrix Appreciation Thread.

I'm in the process of building up a Socket 7 rig for the Ultimate 686 Benchmark Comparison. It is now built. I've decided to go with an Intel i430tx chipset motherboard. The reason being is that my Cyrix MII @ 300 MHz seems to operate fine in it. The board also has support for 72-pin SIMMs (which will make comparison with Cyrix 5x86-133 CPU more appropriate), SDRAM, and AMD K6+ CPUs. I'll only be using 64 MB of RAM so that it is all cacheable. The board also seems to work fine with an 83 MHz FSB, so I can test up to an AMD K6-III-500 CPU.

You may recall from this thread,
Re: Super Socket 7: VIA MVP3 vs. ALi Aladdin V
that the SpeedSys results for VIA/ALi boards with a Cyrix MII were a bit wonky, however everything seems fine for the i430TX chipset board. Results below. Note that the SpeedSys overall score is still a bit off. I think this may be related to having to turn off CPUID to get SpeedSys to even run. The cache/memory throughput seems agreeable though.

The system is complete inside a new ATX case (white) with a custom ATX to AT keyboard/mouse back panel, a fancy Cyrix MII silver case sticker, and an ATX to AT power supply converter. My case couldn't fit any standard single-pole single-throw (SPST) switches for the power button, so I am using the ATX standard momentary on/off power button with a custom circuit I made to translate the momentary on/off pushes into a latching on/off switch (it uses a few transistors, resistors, and a capacitor on a solder board). Photos will come later, although I must say, it is looking slick.

I have now installed Windows 98SE and the MII seems to run fine at 75x4 (300 MHz). Before I get started with the comparison, I still have 10 Cyrix register utilities to evaluate and some new benchmark programs not found in the U4BC. An i430TX won't be the last motherboard found in this system since it doesn't have AGP and can only cache up to 64 MB of RAM.

An i430TX definately won't make the world's fastest Cyrix MII list. Once the benchmark comparison is complete, I'll swap out the board for a VIA or ALi board which I determine to work well with the MII. I have a 2 MB cache VIA board and a 1 MB cache VIA board to evaluate. I also hope to source another reasonably priced ALi SS7 board at some point.

EDIT: I should probably also point out that the motherboard is an AZZA PT-5IT v2.x with a Jan modified BIOS which allows for Cyrix 4x multiplier support and AMD K6+ support. I went ahead and measured all the possible combinations for the CPU core voltage from the onboard voltage regulator as well as all possible FSB frequencies (as measured with an oscilliscope). Attached is a PDF summary of these findings.

The board supports FSB frequencies of 50, 55, 60, 66, 75, and 83 MHz.
The board supports core voltages of 1.95, 2.0, 2.1, 2.5, 2.6, 2.7, 2.8, 2.9, 3.2 Volts. I'd have liked to see more in the 2.2 - 2.4 V range.

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Reply 82 of 386, by kool kitty89

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feipoa wrote:

The topic has gotten quite derailed. It seems nobody takes Cyrix appreciation very seriously. Perhaps the subject like should read Cyrix Fun Thread instead of Cyrix Appreciation Thread.

It might help interest if the thread was moved to the Marvin forum rather than System Specs. (which doesn't really make sense for the topic)

But anyway, interesting comparison with the Intel chipset, and not too surprising that the performance isn't impressive in that configuration. (be it the intel chipset or the slower FSB for that matter)
If/when you do get a good VIA board working, it would definitely be interesting to see if overclocking the bus works well. (especially if 120/124 MHz works -but 110/112/115 MHz would probably be more likely)

Edit:
I was looking around, and noticed that some SS7 boards actually seem to (or at least claim to) support 133 MHz FSB speeds, like this:
http://ee.gigabyte.com/products/page/mb/ga-5smm/
(and, unlike the AT form GA-5Ax series, those GA-5Sxx boards use the SiS 530 & 5595 chipset)

Reply 83 of 386, by sliderider

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kool kitty89 wrote:
It might help interest if the thread was moved to the Marvin forum rather than System Specs. (which doesn't really make sense fo […]
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feipoa wrote:

The topic has gotten quite derailed. It seems nobody takes Cyrix appreciation very seriously. Perhaps the subject like should read Cyrix Fun Thread instead of Cyrix Appreciation Thread.

It might help interest if the thread was moved to the Marvin forum rather than System Specs. (which doesn't really make sense for the topic)

But anyway, interesting comparison with the Intel chipset, and not too surprising that the performance isn't impressive in that configuration. (be it the intel chipset or the slower FSB for that matter)
If/when you do get a good VIA board working, it would definitely be interesting to see if overclocking the bus works well. (especially if 120/124 MHz works -but 110/112/115 MHz would probably be more likely)

Edit:
I was looking around, and noticed that some SS7 boards actually seem to (or at least claim to) support 133 MHz FSB speeds, like this:
http://ee.gigabyte.com/products/page/mb/ga-5smm/
(and, unlike the AT form GA-5Ax series, those GA-5Sxx boards use the SiS 530 & 5595 chipset)

I remember there were at least a few SS7 boards that claimed to support overclocking the bus to as high as 150mhz but none of them ever ran very stable at that speed. Combine that with AGP issues and problems with using 133mhz RAM on some boards, and you'd be looking at the BSOD more often than the desktop.

Reply 84 of 386, by jaqie

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Gigabyte talks about even their current boards like that - check any of their boards, their top listed ram speeds are something like 1866(oc) and such for fsb/ht bus too. It just means you can try to run them at that speed, no guarantee it will work well. Not a point against them to me personally, but it makes some people sour on gigabyte that they do this... to me it just says hey you can set this board that high if you can get away with it.

Reply 85 of 386, by feipoa

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kool kitty89 wrote:
But anyway, interesting comparison with the Intel chipset, and not too surprising that the performance isn't impressive in that […]
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But anyway, interesting comparison with the Intel chipset, and not too surprising that the performance isn't impressive in that configuration. (be it the intel chipset or the slower FSB for that matter)
If/when you do get a good VIA board working, it would definitely be interesting to see if overclocking the bus works well. (especially if 120/124 MHz works -but 110/112/115 MHz would probably be more likely)

I was looking around, and noticed that some SS7 boards actually seem to (or at least claim to) support 133 MHz FSB speeds, like this:
http://ee.gigabyte.com/products/page/mb/ga-5smm/
(and, unlike the AT form GA-5Ax series, those GA-5Sxx boards use the SiS 530 & 5595 chipset)

Of the few socket 7 boards I've tested with the MII-433GP so far, this intel 430TX board seems to be the best performer inasmuch as the L1 write cache is concerned. The L2 and memory throughput seem just right for a 75 MHz FSB chip. I'd like to see the L1 write cache speed up with the read speed where it should be, but at least it is not down at the RAM speed level, as was the case with the ALi and VIA boards. I wouldn't trust the SpeedSys score too much. We'd really need to poke through the SpeedSys source code to see why it is being scored the way it is. Hopefully the Ultimate 686 benchmark comparison should show the MII's true colours a little better. The fact that I need to disable CPUID just to get SpeedSys running on an MII is reason for question.

This Intel TX board's BIOS also has nearly all of the special feature register bits enabled for the MII (by default), with the exception of NO_LOCK, which is easy enough to turn on. Being an Intel board, LINBRST is obviously disabled. I'm not sure if the linear frame buffer is the most optimised, but running 6x86opt to further optimise it didn't improve the Quake timedemo score at all.

As for the GA-5SMM, it does seem many have OC'd it beyond 100 MHz. I can't tell what the speed of the TAG RAM is on the board, I can only see the ELITE cache, which may be 5 ns, but it is often the TAG RAM that is the limiting factor in overclockability. You'd probably want a TAG RAM with at 6 ns or better for speeds > 100 MHz. I wonder if the PLL multiplier/divider for the PCI bus and integrated AGP bus run asynchronously? If synchronously, you'd probably want to measure the PCI/AGP bus frequencies with an oscilliscope to ensure they are somewhat reasonable.

The board also looks a little crippled with only 3 PCI slots and no AGP slot. I'd certainly like to test a Cyrix MII in it though. If one lands in my lap, I will.

Plan your life wisely, you'll be dead before you know it.

Reply 86 of 386, by kool kitty89

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feipoa wrote:

As for the GA-5SMM, it does seem many have OC'd it beyond 100 MHz. I can't tell what the speed of the TAG RAM is on the board, I can only see the ELITE cache, which may be 5 ns, but it is often the TAG RAM that is the limiting factor in overclockability. You'd probably want a TAG RAM with at 6 ns or better for speeds > 100 MHz. I wonder if the PLL multiplier/divider for the PCI bus and integrated AGP bus run asynchronously? If synchronously, you'd probably want to measure the PCI/AGP bus frequencies with an oscilliscope to ensure they are somewhat reasonable.

The board also looks a little crippled with only 3 PCI slots and no AGP slot. I'd certainly like to test a Cyrix MII in it though. If one lands in my lap, I will.

Given the info discussed here:
http://www.madshrimps.be/vbulletin/f39/gigaby … clocking-58174/

It looks like the GA-5SMM supports a 1/4 PCI divider, allowing 133 MHz FSB with 33 MHz PCI bus.

However, that would be a good question for other boards with >100 MHz settings. Without 1/4 PCI divider setting, you'd be stuck with going beyond 33 MHz for FSB overclocks. (or completely separate clocks provided for the PCI bus -several SS7 FIC boards decoupled the RAM and FSB speeds, but I'm not sure about AGP or PCI -iirc, running at 75 or 83 MHz usually overclocked the PCI bus, so maybe the >100 speeds do too)

Reply 87 of 386, by leileilol

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I had a Cyrix6x86MX200 cpu. Had to clock it down to 80mhz for it to work though. Forgot the motherboard but it's definitely one that housed a S7 P5-100MHz.
I might dig up this machine later

apsosig.png
long live PCem

Reply 88 of 386, by feipoa

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For comparison with the above TX SpeedSys results, here is the Cyrix MII - 300 MHz at 3 x 100 MHz (as opposed to 4 x 75 MHz). The increase in memory throughput didn't exactly blow me away. My FIC PA-2013 only gets 113 MB/s at 100 MHz FSB, while this little HOT gets 120 MB/s and the TX (at 75 MHz) gets 100 MB/s.

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Reply 89 of 386, by kool kitty89

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It really is odd that the improvement is so modest at 100 MHz. Have you tried those MVP3 boards at 75 MHz for comparison? (if they compare favorably with the Intel board, then that would imply the problem lies at 100 MHz in general)

Those benchmarks don't compare very favorably at all even with those of that 133 MHz comparison here: 133 MHz Challenge - 5th/6th gen CPU per clock performance (and those are on a 66 MHz bus)

Reply 90 of 386, by feipoa

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kool kitty89 wrote:

It really is odd that the improvement is so modest at 100 MHz. Have you tried those MVP3 boards at 75 MHz for comparison? (if they compare favorably with the Intel board, then that would imply the problem lies at 100 MHz in general)

It looks right to me. I recall reading reviews concluding that a 100 MHz FSB on socket7s wasn't such a magnificant leap in performance compared to the PII's.

kool kitty89 wrote:

Those benchmarks don't compare very favorably at all even with those of that 133 MHz comparison here: 133 MHz Challenge - 5th/6th gen CPU per clock performance (and those are on a 66 MHz bus)

I'm not sure how the raw score is calculated in Speedsys, but having to disable CPUID just to test the MII may imply that not all the bugs (in SpeedSys) have been worked out. I, therefore, question the precision of the raw score for the MII. 1000+ MB/s for 64KB L1 cache seems fairly common for 300 MHz operation though.

Plan your life wisely, you'll be dead before you know it.

Reply 91 of 386, by kool kitty89

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feipoa wrote:
kool kitty89 wrote:

It really is odd that the improvement is so modest at 100 MHz. Have you tried those MVP3 boards at 75 MHz for comparison? (if they compare favorably with the Intel board, then that would imply the problem lies at 100 MHz in general)

It looks right to me. I recall reading reviews concluding that a 100 MHz FSB on socket7s wasn't such a magnificant leap in performance compared to the PII's.

I got the opposite impression from the reviews/comments I've read on (good quality) Super 7 boards compared to PII/III/Celeron. The impact of FSB speed on the PII/III/Celeron was far less dramatic than Socket 7 CPUs due to the on-card/on-die L2 cache vs the board mounted cache (tied to the FSB speed).
Thus, the performance difference between a K6-2 300/100 vs 300/66 was much bigger than a similar situation of 66 vs 100 MHz Pentium/Celeron parts of similar internal clock speeds. (and then there's the separate issue of comparing Celerons with on-die L2 cache with PIIs/IIIs with 1/2 speed external cache -larger but slower; so to be fair to the Socket 7 comparison, you'd want to only compare otherwise identical CPUs at different FSB speeds)

The increase in L2 cache performance should have been more consistent than RAM too since latency for DRAM will always be high (and 100 MHz SDRAM will be little better than 66 MHz), though peak bandwidth will be higher. (useful for moving large blocks of data, but less and less significant for smaller chunks as latency becomes more significant) Though for measuring peak throughput (for cache fill/block move/etc), the peak bandwidth of DRAM should be pretty well represented.

That said, the improvement in L2 cache performance between 75 and 100 MHz is relatively consistent with a 33% speed boost. (256 vs 203 MB/s, not quite a 1.33:1 difference, but reasonably close)

The bigger issue was the overall poor cache/RAM performance (at 75 or 100 MHz) compared to the speedsys scores of the 66 MHz bus processors in the other thread (or other contemporary scores -including the standardized comparisons listed within speedsys itself).

I'm not sure how the raw score is calculated in Speedsys, but having to disable CPUID just to test the MII may imply that not all the bugs (in SpeedSys) have been worked out. I, therefore, question the precision of the raw score for the MII. 1000+ MB/s for 64KB L1 cache seems fairly common for 300 MHz operation though.

Yes, this is a good point, and a good reason to expand the comparison to other benchmarks.

That certainly might explain the sub-par performance results in speedsys. (again, not so much between 75 and 100 MHz, but for the CPU in general) The L1 speed makes sense, but the other areas don't.

Reply 92 of 386, by feipoa

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You made a good point about the on-die cache. For the Cyrix CPU, the graphs indicate a 25% L2 increase in going from 75 to 100 MHz, which wouldn't seem to affect much on a PII-400/100 vs. a PII-400/66 as the cache is running at 400 MHz in both cases. If I run into the article again (which claimed otherwise), I'll link it.

Plan your life wisely, you'll be dead before you know it.

Reply 93 of 386, by kool kitty89

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Compared to the figures in the 133 MHz challenge thread, the 75 and 100 MHz L2 cache performance compares rather favorably with the 66 MHz cache shown there. The best case results for those 66 MHz examples was the K6-III+ and Pentium MMX (at ~176 and ~173 MB/s) compared with your ~203 MB/s at 75 MHz and ~256 MB/s at 100 MHz, which match up reasonably close with 13.6 and 50% speed increases.

The actual processor speed score and RAM bandwidth still seem odd though. (again, other possible factors there)

Are there any older/slower MII models that don't require CPUid to be disabled? (if the scores are still low, then there's something else going on)

On a more general note on Cyrix history, I wonder why it took so long to transition from ~2.8/2.9V 350 nm to 250 nm 2.2V parts. Prior to that, Cyrix (with IBM) hadn't been too far behind Intel or AMD for process updates (in spite of being fabless), and that delay during the MII's life would certainly seem to be significant. (aside from heat and clock speed limits, there's the higher cost and poorer yields of larger dies)

Perhaps the National Semiconductor merger contributed to those delays, especially if NatSemi wasn't capable of high-volume 250 nm fabrication at all at the time.

With or without other architectural updates, being stuck on 350 nm would have been a crippling limitation compared to the mainstream competition. (which had switched over to denser/cooler 250 nm parts by mid 1998)

Reply 95 of 386, by feipoa

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Was the motherboard OK? Some Shuttle boards are very sensitive to this.

For how long was it turned on while placed in the socket backwards?

Plan your life wisely, you'll be dead before you know it.

Reply 96 of 386, by Chewhacca

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It was a Gigabyte 486AM/S, it was in for a few minutes before I realized it. Unfortunately, it got thrown out with some other stuff I got rid of. The motherboard is still in use as my 486DX-4

Reply 97 of 386, by feipoa

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Yeah, a few minutes is definately too long; the chips are usually savable if it was under 10 seconds or so. I'm surprised you didnt smell the foul burning smell sooner.

Plan your life wisely, you'll be dead before you know it.

Reply 98 of 386, by mwdmeyer

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I had a Cyrix PR200 back in the day. My school friend sold it to me. He said it was a Pentium 200 and it was meant to upgrade my Pentium 133.

The Cyrix PR200 was slower at 3D games than my Pentium 133, I was pissed :p

I ended up over-clocking the Pentium 133 to 166 and moved the Cyrix into another machine.

Reply 99 of 386, by kool kitty89

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mwdmeyer wrote:

I had a Cyrix PR200 back in the day. My school friend sold it to me. He said it was a Pentium 200 and it was meant to upgrade my Pentium 133.

The Cyrix PR200 was slower at 3D games than my Pentium 133, I was pissed :p

I ended up over-clocking the Pentium 133 to 166 and moved the Cyrix into another machine.

Depending on the specific games in question, that shouldn't be universally true . . . Quake definitely would be the worst example (very Pentium optimized, and unusually pentium-specific at that), while pretty much all other 3D games up through the end of 1996 catered much better to 486 (and by extension) the integer-optimized 6x86 (and K5).

Tomb Raider should have run as fast (or faster) on a 6x86-200 than a Pentium 200. (same for Wing Commander IV, Descent, and several others -accelerated renderers or other driver-dependent renderers would also depend on the drivers used though . . . and whether non-pentium specific drivers were available at all)

Plus, since you had a Pentium based PC in the first place and you upgraded only the CPU, you probably had an Intel based motherboard too, so the 6x86 wouldn't be at its best there either. (VIA chipsets were usually best for Cyrix 6x86 chips) . . . And also might be problematic at 75 MHz in general.

I also assume you're talking about the 6x86 200 classic, not the MX. (as then you'd also have had the K6 to consider too)