First post, by ih8registrations
<0xffd, shouldn't it be 0xffc? It's a dword access so word and byte would be unaligned, aka addresses with the last three bits set. 0xffd lets byte addresses pass through, and just blocks word. As well, why not change the check to a lighter (!(address&3))? Or am I missing something?
IINLINE Bit32u mem_readd_dyncorex86(PhysPt address) {
if ((address & 0xfff)<0xffd) {
Bitu index=(address>>12);
if (paging.tlb.read[index]) return host_readd(paging.tlb.read[index]+address);
else return paging.tlb.handler[index]->readd(address);
} else return mem_unalignedreadd(address);
}