First post, by Zorbid
I may actually give a crack at implementing MMX, at least for the normal core.
The instruction set is self-contained, the only flags affected by MMX instruction is the FPU tag register. Any MMX opcode will set it to 0x0000 while the EMMS instruction sets it to 0xFFFF. At first sight, I think I may be able to do it; for intel hosts to begin with (using SSE2 intrinsics).
My (probably naive) plan is the following:
1) create a union type for the 8 mm registers.
2) memory fetch/write functions for 64 bit words
3) implement the various opcodes (prefix 0x0f, it should be straightforward with the intrinsics for most operations. I'll simulate the register allocation manually because, as far as I can tell, it's not possible to do register allocation from C++ intrinsics (though it's probably possible by using inline ASM but I prefer not to do that ATM))
I have 2 questions ATM:
1) I haven't tried (yet) to decipher the logic of the dynamic core. Can I add the instructions to the normal core without changing the dynamic one, or do I have to modify it too? I know that the dynamic core switches back to the normal one in some circumstances, but I don't know if it would be automatic in this case.
2) Is it possible to compile DOSBox for an x64 target. There's no support for 64 bit SSE2 intrinsics in MSVC++ (an arbitrary decision from microsoft), so I'd have to use the emulated instructions from the MMX library instead.
If I manage to get it working on the x86 host, I'll try to make a cross-platform version too. , and perhaps other CPUs later on. I'm afraid that this MMX library is Intel-only though... asm/sigcontext.h, which is included somewhere is architecture specific. There are alternatives, I'll have to check.
P.S. I expect this to be slow...