VOGONS


First post, by tigrou

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In paging.h, there is a structure named tlb:

struct {
HostPt read[TLB_SIZE];
HostPt write[TLB_SIZE];
PageHandler * readhandler[TLB_SIZE];
PageHandler * writehandler[TLB_SIZE];
Bit32u phys_page[TLB_SIZE];
} tlb;

Does it have similar function as TLB cache on real hardware : to accelerate the translation of virtual => physical addresses ?
AFAIK paging require at two additional reads (vs real mode) : one in page directory and one in page table.

Could it be potentially be turned off / removed in DOSBox, the only consequence would be the emulation would be slower ?
Or is it an essential part (other than a cache) that need to be emulated ?

Reply 1 of 1, by tigrou

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It seems that TLB structure has exact same purpose as TLB cache on real hardware : to make memory read/write operations much faster.
DOSBox code that handle paging is fairly complex and using TLB structure all needed is to read a value in a single dimension array.

By default DOSBox create a cache with 1024*1024 entries, which means it can map all possible address in the 4GB range (4GB / 4KB = 1MB).