rmay635703 wrote on 2022-01-05, 18:27:
Not to burst yer bubble but SRA M can’t be just put on a simm (unless your memory controller supported it) dram runs in columns, sram is directly addressed with no refresh.
I figure that if you put some glue logic, most prominently a row address latch, on the SRAM SIMM, you can make it look like DRAM to the controller. A 15ns fast CMOS SRAM and some 74ACT series logic is likely still faster than your average 60ns DRAM. But you are definitely right that you can't just wire SRAM chips to the SIMM pins, as you can do it with DRAM chips. And a SRAM SIMM emulating DRAM only improves performance if the mainboard allows you to make memory access timing faster than the DRAM chips you have can handle.
So: If you want to run a 486 board at DRAM timings designed for FSB25 at FSB50, you could have a lot of fun with DRAM-emulating SRAM SIMMs. If you want to avoid memory addressing wait states on your XT-class machine, it's not going to help, except for a small performance gain obtained from disabling refresh.
By the way: The opposite way also exists as a product. Chips that internally contain fast a fast DRAM and a built-in memory controller, so they can be accessed just like a slow SRAM (think of 100ns SRAM, not 10ns SRAM). For high-capacity, low performance chips, this is the most cost-effective way to implement something that behaves like an SRAM today.