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Reply 20 of 36, by majestyk

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Have you enabled "reset configuration data" in BIOS once after the BIOS update?

Reply 21 of 36, by H.W.Necromancer

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majestyk wrote on 2023-01-02, 11:03:

Have you enabled "reset configuration data" in BIOS once after the BIOS update?

I think yes. But I can try again. I have even replaced the bios.
Is there any chance the CPU is the problem? I am running a 233MMX. Maybe I can try the one it came with. It had a 150Mhz pentium in it.
--
I have also added a COST module to have 512kn of cache. But the PC is table and runs with all the OSes, games, 3Dfx etc. stuff pretty well..

Reply 22 of 36, by majestyk

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My own "Rhino 9" is revision 1.12, it is prepared for a proprietary 16-PIN USB header that´s not populated, so I cannot test anything.

I think we can rule out CPU and cache here.
Have a look at the datasheet:

82371FB.PDF

On page 112 you can find the pinout and the pin numbers of the USB lines: Pin 142,143,144 and 145. Check for continuity between these 4 legs of the southbridge and the respective USB header pins. You should also measure resistance between both data lines and ground in both directions.
If possible, you should also measure the USB clock frequency at pin 146. It should be 48 MHz.

If, in the worst case, the southbridge is defective, don´t worry. It´s still available online (Ebay etc.) and it can be replaced quite easily.

Reply 23 of 36, by H.W.Necromancer

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majestyk wrote on 2023-01-02, 13:44:
My own "Rhino 9" is revision 1.12, it is prepared for a proprietary 16-PIN USB header that´s not populated, so I cannot test any […]
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My own "Rhino 9" is revision 1.12, it is prepared for a proprietary 16-PIN USB header that´s not populated, so I cannot test anything.

I think we can rule out CPU and cache here.
Have a look at the datasheet:
82371FB.PDF

On page 112 you can find the pinout and the pin numbers of the USB lines: Pin 142,143,144 and 145. Check for continuity between these 4 legs of the southbridge and the respective USB header pins. You should also measure resistance between both data lines and ground in both directions.
If possible, you should also measure the USB clock frequency at pin 146. It should be 48 MHz.

If, in the worst case, the southbridge is defective, don´t worry. It´s still available online (Ebay etc.) and it can be replaced quite easily.

Thank you very much!
Replacing the chip is the last resort - the external card is still an option but I am trying to get maximum out of the board. Becouse why not. Except the USB it is stable as a rock and considered the period of 1996 it is a speed daemon!
BTW.
What resistance should I expect between DATA and GND?

Reply 25 of 36, by H.W.Necromancer

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rasz_pl wrote on 2023-01-02, 23:48:

according to specs ~15Kohm

Thank you.
I have checked all data pins to ground and I am reading very high values. Approx. 2.5mOhms !
Once or twice I got 380kohm (but it may be my mistake) but nothing close to 15kohm.
--
/-:

Reply 26 of 36, by majestyk

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Did you measure both polarities?

Reply 27 of 36, by H.W.Necromancer

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majestyk wrote on 2023-01-03, 10:26:

Did you measure both polarities?

Yes, I flipped my probes, red and black. It means red on gnd and black on pins and vice versa. I am going to trace the pins to the chipset and check the whole trace.

Reply 28 of 36, by H.W.Necromancer

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Hallo, so I have checked the resistance and it is most likely not OK becouse DATA to GND, DATA to VCC or even an data pin to other is in the range of mega ohms. It is 2.7 in between data pins and GND and like 6mega! from one data pin to the other one.
The data pins are directly connected to the chip, there are no other parts. It just beeps and resistance is 0.6 or something. Just a line from the pin to the chipset pin. Which brings much higher possibility the chip is busted by some accident in the past. (?). Or they used bad chip. Need to find another board to compare. If anybody is an owner of this particular board I would be happy for any information.

Reply 29 of 36, by majestyk

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H.W.Necromancer wrote on 2023-01-04, 08:40:

...The data pins are directly connected to the chip, there are no other parts. It just beeps and resistance is 0.6 or something. Just a line from the pin to the chipset pin...

That´s not "lege artis", according to Intel´s specs there are several components necessary to ensure EMV requirements, limit USB power consumption etc.
Most mainboard manufacturers managed to abide by these demands. Octek have chosen a quite imprudent solution here.

hx_usb.JPG
Last edited by majestyk on 2023-01-04, 20:53. Edited 1 time in total.

Reply 30 of 36, by weedeewee

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H.W.Necromancer wrote on 2023-01-04, 08:40:

Hallo, so I have checked the resistance and it is most likely not OK becouse DATA to GND, DATA to VCC or even an data pin to other is in the range of mega ohms. It is 2.7 in between data pins and GND and like 6mega! from one data pin to the other one.
The data pins are directly connected to the chip, there are no other parts. It just beeps and resistance is 0.6 or something. Just a line from the pin to the chipset pin. Which brings much higher possibility the chip is busted by some accident in the past. (?). Or they used bad chip. Need to find another board to compare. If anybody is an owner of this particular board I would be happy for any information.

Well, I just checked on my hx board
intel pciset sb82371sb
and from +5v and gnd to Pin 142,143,144 and 145 I get a normal diode mode reading.

Annoying thing on this board I got is that the usb header isn't populated and there are two resistorarrays and four capacitors not populated which connect the pins to the usb header pads.

Right to repair is fundamental. You own it, you're allowed to fix it.
How To Ask Questions The Smart Way
Do not ask Why !
https://www.vogonswiki.com/index.php/Serial_port

Reply 31 of 36, by H.W.Necromancer

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majestyk wrote on 2023-01-04, 20:27:
That´s not "lege artis", according to Intel´s specs there are several components necessary to ensure EMV requirements, limit USB […]
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H.W.Necromancer wrote on 2023-01-04, 08:40:

...The data pins are directly connected to the chip, there are no other parts. It just beeps and resistance is 0.6 or something. Just a line from the pin to the chipset pin...

That´s not "lege artis", according to Intel´s specs there are several components necessary to ensure EMV requirements, limit USB power consumption etc.
Most mainboard manufacturers managed to abide these demands. Octek have chosen a quite imprudent solution here.

hx_usb.JPG

Yes. I have not studied the power circuitry but it looks like VCC and GND goes directly to the respective power planes in the inner layers. Then there are 4 tracks going through some via right to the chipset. Which I can trace with my DMM as I said before there is almost zero resistance which does not comply with the schematics you have uploaded.
So my assumptions are it is either internally busted in the south bridge. Or the implementation is faulty by design. Which I can ´t tell untill I gonna find another board ro compare.
Anyway if you have USB header connected like that it is super easy to damage the board.
I probably gonna use it and put an USB 2.0 card in it. Replacing the chip would be fun but....(?).
--
BTW. I just put my DMM probes on to the VSS of the chip a s the data pin for USB and measured right on the chip. There are almost 3 megaohms. For me this the proof the chip is not OK internally. Anyway it is weird it still register something beeing connected.

Reply 32 of 36, by majestyk

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Probably some components of the USB I/O circuitry inside the SB have been damaged due to poor mainboard design.
Otherwise the Rhino 9 is a great HX mainboard, components / electrolytics are high quality (mine has ELNA caps, later revisions have Rubycon). Even the double TAG-RAM setup for full 512MB cacheable area is laid out perfectly.

Reply 33 of 36, by H.W.Necromancer

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majestyk wrote on 2023-01-04, 21:01:

Probably some components of the USB I/O circuitry inside the SB have been damaged due to poor mainboard design.
Otherwise the Rhino 9 is a great HX mainboard, components / electrolytics are high quality (mine has ELNA caps, later revisions have Rubycon). Even the double TAG-RAM setup for full 512MB cacheable area is laid out perfectly.

Yeah I agree! I have put the COST module there and the 2 TAGs surprised me. It is one for onbord and second is driving my COST? Capacitors looks all good. Masive heatsinks on the regulators. So far I have 96MB ram there and VGA is ATI Rage II with 4MB. Hard to get modules above 16mb.
The only problem is the linear regulator is getting very hot with my P233MMx. Maybe I should use a more modern bord and keep this a as a powerhouse for some 166Mhz no MMX stuff. Ot some K5 cpu? I have planty of boards. And planty of s7 CPUs. But HX is def. a "speedy gonzales" with all that cache....

Reply 34 of 36, by majestyk

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I replaced the heatsink by a taller one (50mm) and the heat issue is gone.

octek_rhino_9_hs.jpg

The two TAG RAMS are working as a "cascade" to support the 11bit TAG I/O bus that you need for caching more than 64MB RAM.

Reply 35 of 36, by H.W.Necromancer

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majestyk wrote on 2023-01-04, 21:39:

I replaced the heatsink by a taller one (50mm) and the heat issue is gone.
octek_rhino_9_hs.jpg

The two TAG RAMS are working as a "cascade" to support the 11bit TAG I/O bus that you need for caching more than 64MB RAM.

Thank you. That is cool. Where did you get this heatsink? That has been exactly my idea to find 2x taller but with the same footprint. Hope I can get one. What CPU do you run in it?
Is there any advantage of having those two chip compared to one 11bit TAG?
Anyway, thank you very much for all the help.
--

Reply 36 of 36, by majestyk

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It´s a "Fischer SK129/50,8STS" heatsink (available from Farnell, Conrad and others).

At the moment there´s a Pentium 233 MMX on this board, probably a K6-2, K6-III or a K6-+ CPU would be an option with the bigger heatsink, but the resistors for voltage selection would have to be adapted and I´m not sure about BIOS support.

There were no DIL28 11bit TAG chips, that´s why they combined a regular 8-bit one with an additional one for the remaining 3 bits.
Many HX mainboards lack the second TAG-RAM (-socket) and that means depite of having 512K L2 cache the cacheable area remains limited to 64 MB RAM.