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Need advice on how to flash SPD on a 440BX ASUS motherboard.

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First post, by shevalier

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Many thanks to @rasz_pl for this post.
Download and run Astra32 portable
http://www.astra32.com/download.htm
And Spdtool 0.63 perfectly work with 440BX motherboard from Asus.

________________________________
I have 4 sticks 256MB dual rank of IBM branded RAM and and CUBX-L motherboard.
BUT,
1 - Micron, 2 - Infineon, 1 - Hunix.
And they all have quite different SPD.

SPDtool reports an incompatible SMbus driver.
Frankly, I don’t want to solder, because the stick do not have a standard SOIC-8 case, but a miniSOIC.

In general, I need a program for DOS or Windows that works with 440BX for write SPD to RAM.
Definitely, I want 1GB of RAM on 440BX with a bus speed of 133MHz. 😀

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Last edited by shevalier on 2023-06-25, 10:54. Edited 2 times in total.

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JetWay K8T8AS, Athlon DH-E6 3000+, Radeon HD2600Pro AGP, Audigy 2 Value

Reply 1 of 4, by SSTV2

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There is no need to desolder the SPD ICs in order to reprogram them, as they are directly accessible via the edge connector. You can use a spare DIMM slot or any dead motherboard and wire it to the programmer.

Reply 2 of 4, by shevalier

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SSTV2 wrote on 2023-06-24, 13:10:

There is no need to desolder the SPD ICs in order to reprogram them, as they are directly accessible via the edge connector. You can use a spare DIMM slot or any dead motherboard and wire it to the programmer.

AIDA64 reads SPD normally, which means that all circuits are wired and functioning.
Really no one wrote a utility in those years?

DMI BIOS Version : ASUS CUBX-L ACPI BIOS Revision 1008 Beta 004

------[ 1 SMBus detected ]------

------[ Asus SPD Method 1 ]------

------[ Asus SPD Method 2 ]------

------[ Asus SPD Method 3 ]------

------[ SMBus Device B00-D50 ]------

0000 80 08 04 0C 0A 02 40 00 01 70 54 00 80 08 00 01 ......@..pT.....
0010 8F 04 06 01 01 00 0E 75 54 00 00 0F 0E 0F 2D 20 .......uT.....-
0020 15 08 15 08 00 00 00 00 00 00 00 00 00 00 00 00 ................
0030 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 69 ...............i
0040 2C FF FF FF FF FF FF FF 04 31 36 4C 53 44 54 33 ,........16LSDT3
0050 32 36 34 41 47 2D 31 33 45 45 31 01 00 02 12 43 264AG-13EE1....C
0060 07 39 D1 00 00 00 00 00 00 00 00 00 00 00 00 00 .9..............
0070 00 00 00 00 00 00 00 00 00 00 00 00 00 00 64 FF ..............d.
0080 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................
0090 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................
00A0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................
00B0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................
00C0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................
00D0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................
00E0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................
00F0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................

------[ SMBus Device B00-D51 ]------

0000 80 08 04 0C 0A 02 40 00 01 75 54 00 80 08 00 01 ......@..uT.....

Aopen MX3S, PIII-S Tualatin 1133, Radeon 9800Pro@XT BIOS, Diamond monster sound MX300
JetWay K8T8AS, Athlon DH-E6 3000+, Radeon HD2600Pro AGP, Audigy 2 Value

Reply 3 of 4, by rasz_pl

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>ASUS CUBX-L
Asus is special, it locks SPD bus out. you have to specifically enable it. Most tools like Everest/AIDA/Astra/Sandra/CPUZ have this code. They share i2c bus between clock generator/monitoring chip and ram SPD using a mux. If you switch this mux and forget to switch it back computer will have trouble rebooting because bios blindly assumes its always set to clock gen.
I know this because I emailed cpuz author code to do this back in 2007 when noticing cpuz wasnt reading A7V133 😀 Wasnt my code, I think I got it from Everest author (tamas.miklos@lavalys) after helping him debug 😀 Everything started with my lm-sensors bug report because Linux couldnt access spd 😀
https://marc.info/?l=lm-sensors&m=117538100315786&w=2
Everest Ultimate 5.50 had a bug where it would unlock SPD, but not lock it again - this might be your in, try to find and install this very version and the bug might still be there 😀
ASTRA32 was another program in 2007 that unlocked SPD bus on ASUS boards and didnt bother to lock it back up. I also let the author know about the rebooting problem and a fix.
https://marc.info/?l=lm-sensors&m=117544836806201&w=2
looks like SPDINFO.EXE was part of sisoftsandra and is able to unlock SPD bus on Asus boards.
https://forum-index-hu.translate.goog/Article … &_x_tr_pto=wapp
>Sisoft Sandra's professional DOS program SpdInfo.exe , which, if you don't want to run test programs, you should definitely get (70kB) (part of Sandra)
I dont know where to get it now 🙁

TLDR:

'CUBX'

enable SPD
       temp = inb_port($e437);
       outb_port($e437,(temp & 0xe7) | 0x08);

disable SPD
       outb_port($e437,temp);

you should be able to do this in dos with debug.exe on with pciset under windows xp

debugging with Everest author:

From: RusH Date: Mon, 2 Apr 2007 01:55:18 +0200 Subject: Re: read the spd on A7V133 To: "Tamas MIKLOS (Lavalys)" <tamas.miklos@l […]
Show full quote

From: RusH
Date: Mon, 2 Apr 2007 01:55:18 +0200
Subject: Re: read the spd on A7V133
To: "Tamas MIKLOS (Lavalys)" <tamas.miklos@lavalys.com>

On 4/1/07, Tamas MIKLOS (Lavalys) <tamas.miklos@lavalys.com> wrote:
> Hi,

Hi. First I want to thank you VERY much. You saved me a ton of
hacking, poking and proding.

> I've just checked the BIOS image of A7V133, and found out that it only
> alters bit0 of E44C, so please try to use this trick, and let me know how it
> works. If it doesn't cause issues about reboot, then I'll modify EVEREST
> according to this, and send you a new beta so you can try if it eliminates
> the reboot issue.

original
rasz@capek:~$ sudo isadump -f 0xe440 16
0 1 2 3 4 5 6 7 8 9 a b c d e f
e440: 10 00 00 00 71 00 00 00 fd 02 c0 00 ff f6 ff 0f
rasz@capek:~$ sudo i2cdetect -y 0 |grep 50
50: XX XX XX XX XX XX XX XX XX XX XX XX XX XX XX XX

bit 0 0xe44c
rasz@capek:~$ sudo isaset -f 0xe44c 0xfe
rasz@capek:~$ sudo isadump -f 0xe440 16
0 1 2 3 4 5 6 7 8 9 a b c d e f
e440: 10 00 00 00 71 00 00 00 fd 02 c0 00 fe f6 ff 0f
rasz@capek:~$ sudo i2cdetect -y 0 |grep 50
50: XX XX XX XX XX XX XX XX XX XX XX XX XX XX XX XX

method 1 from your code (bit 4 0xe44c)
rasz@capek:~$ sudo isaset -f 0xe44c 0xef
rasz@capek:~$ sudo isadump -f 0xe440 16
0 1 2 3 4 5 6 7 8 9 a b c d e f
e440: 10 00 00 00 71 00 00 00 fd 02 c0 00 fe f6 ff 0f
rasz@capek:~$ sudo i2cdetect -y 0 |grep 50
50: XX XX XX XX XX XX XX XX XX XX XX XX XX XX XX XX

method 2 from your code (bit 0 0xe44d)
rasz@capek:~$ sudo isaset -y -f 0xe44d 0xf7
rasz@capek:~$ sudo i2cdetect -y 0 |grep 50
50: 50 51 52 XX XX XX XX XX XX XX XX XX XX XX XX XX

succes. So its bit 0 of 0xe44d. Now ill try to reboot.

... bzz bzzz ...

ok, reboot successful. So its not this. Something else is very aggressive.

Looking at "overclocking" tab it might be timings reading. BTW Why do
you display only one line of timings? KT133/133A can have 4 dimm
slots, every single one with its own timings (regs 0x64-0x67). It
would be more helpfull to display 4 separated readouts.
Or it can be clock generator probe, its ICS 94215AF, propably also on
smbus(?). I dont know if I remember right, but I think everest was
displaying ICS 94215 (without AF), I cant find AF datasheet, all I
have is plain 94215 and YF-T.

Anyway Im ready for you to throw some debug version at me to test
which part will make computer hang on reboot.

Here is copy of email that fixed cpuz, also shared with coreboot devs at https://mail.coreboot.org/pipermail/coreboot/ … ril/019638.html
I dont remember how I arrived at pseudocode from original C, maybe I rewrote it at the time:

From: RusH
Date: Wed, 4 Apr 2007 04:32:01 +0200
Subject: Asus smbus mux
To: cpuz@cpuid.org

http://forum.x86-secret.com/showthread.php?t=6963

code to enable spd on various asus boards:

       ulong temp, temp2;

'3V4X'

enable SPD
       temp = inl_port($e44c);
       outl_port ($e44c,(temp & 0xe7ffffff) | 0x08000000);

disable SPD
       outl_port($e44c,temp);

----------------------

'K7V'
'A7V'
'A7V133'
'A7P'
'A7M'

enable SPD
       temp = inb_port($e44d);
       outb_port ($e44d,temp | 0x01);

disable SPD
       outb_port($e44d,temp);

This one is tested on A7V133, from DSTD
 OperationRegion (\SGPO, SystemIO, 0xE44C, 0x04)
 Field (SGPO, ByteAcc, NoLock, Preserve)
 {
     GPO0,   1,
             Offset (0x01),
     GPO8,   1, fe
         ,   2,
     GP11,   1,
             Offset (0x04)
 }

tested
1 1 1 1 0 0 0 0 GPO0
1 0 0 1 1 0 0 1 GPO8
0 1 0 1 1 0 1 0 GP11
s c n n n n c s

s=spd + hwmonitor
c=clock + hwmonitor
n=hwmonitor
----------------------

'P3B'
'CUBX'
…Show last 133 lines

enable SPD
       temp = inb_port($e437);
       outb_port($e437,(temp & 0xe7) | 0x08);

disable SPD
       outb_port($e437,temp);

----------------------

'CUPL'
'UV4X'

enable SPD
       temp = inl_port($e44c);
       outl_port($e44c,(temp & 0xfffff6fff) | 0x100);

disable SPD
       outl_port($e44c,temp);

----------------------

'USL2'
'CUC2'
'-A7V266-E'
'-A7V266-M'
'-A7V266'
'WEM'
'-CUW'
'<<CUW>>'
'P3C'
'UEP2'
'TUEG'
'-MEW-'
'<<MEW>>'
'-P3W-E'
'<<P3W>>'
'CUSI'
'CUV2'
'A7S'

enable SPD
        outb_port($2e,$87);
        outb_port($2e,$87);
        outb_port($2e,7);
        outb_port($2f,8);
        outb_port($2e,$f1);
        temp = inb_port($2f);
        outb_port($2e,$f1);
        outb_port($2f,(temp & 0xe7) | 0x10);
        outb_port($2e,$aa);

disable SPD
        outb_port($2e,$87);
        outb_port($2e,$87);
        outb_port($2e,7);
        outb_port($2f,8);
        outb_port($2e,$f1);
        outb_port($2f,temp);
        outb_port($2e,$aa);

----------------------

'CUR'

enable SPD
        temp = inb_port($ec80);
        outb_port($ec80,(temp & 0xef) | 0x10);
        temp2 = inb_port($ec84);
        outb_port($ec84,(temp2 & 0xef) | 0x10);

disable SPD
        outb_port($ec80,temp);
        outb_port($ec84,temp2);

----------------------

'A7V333'

enable SPD
        outb_port($2E,$87);
        outb_port($2E,$87);
        outb_port($2E,7);
        outb_port($2F,8);
        outb_port($2E,$F0);
        temp = inb_port($2F);
        outb_port($2E,$F0);
        outb_port($2F,(temp & 0xE7) | 0x10);
        outb_port($2E,$F1);
        temp2 = inb_port($2F);
        outb_port($2E,$F1);
        outb_port($2F,(temp2 & 0xE7) | 0x10);
        outb_port($2E,$AA);

disable SPD
        outb_port($2E,$87);
        outb_port($2E,$87);
        outb_port($2E,7);
        outb_port($2F,8);
        outb_port($2E,$F0);
        outb_port($2F,temp);
        outb_port($2E,$F1);
        outb_port($2F,temp2);
        outb_port($2E,$AA);

----------------------

'<P4B>'

enable SPD
        outb_port($2E,$87);
        outb_port($2E,$87);
        outb_port($2E,7);
        outb_port($2F,7);
        outb_port($2E,$F2);
        temp = inb_port($2F);
        outb_port($2E,$F2);
        outb_port($2F,(temp & 0xFC) | 0x1);
        outb_port($2E,2);
        temp2 = inb_port($2F);
        outb_port($2F,temp2 | 0x2);
        outb_port($2E,$AA);

disable SPD
        outb_port($2E,$87);
        outb_port($2E,$87);
        outb_port($2E,7);
        outb_port($2F,7);
        outb_port($2E,$F2);
        outb_port($2F,temp);
        outb_port($2E,$AA);

----------------------

Code I graciously received from Tamas MIKLOS:

From: "Tamas MIKLOS (Lavalys)" <tamas.miklos@lavalys.com>
Date: Sun, 1 Apr 2007 23:27:00 +0200
Subject: Re: read the spd on A7V133
To: RusH

Hi,

I'm sending you the Asus SPD multiplexing code in my next email.  Let me 
know what happens if you try to manually alter the relevant bit(s), ie. if 
it causes issues with the reboot, just like with EVEREST.

Var
  AsusSPDMethod,AsusSPDValueB1,AsusSPDValueB2 : Byte;
  AsusSPDValueD : DWord;

Procedure EnableAsusSPDSub(method:Integer);

Begin
  AsusSPDMethod :=method;
  AsusSPDValueB1:=0;
  AsusSPDValueB2:=0;
  AsusSPDValueD :=0;

  Case AsusSPDMethod Of
    1 : Begin
          AsusSPDValueD:=Port_ReadDWord($E44C);
          Port_WriteDWord($E44C,(AsusSPDValueD And $E7FFFFFF) Or $08000000);
        End;

    2 : Begin
          AsusSPDValueB1:=Port_ReadByte($E44D);
          Port_WriteByte($E44D,(AsusSPDValueB1 And $F6) Or 1);
        End;

    3 : Begin
          AsusSPDValueB1:=Port_ReadByte($E437);
          Port_WriteByte($E437,(AsusSPDValueB1 And $E7) Or 8);
        End;

    4 : Begin
          AsusSPDValueD:=Port_ReadDWord($E44C);
          Port_WriteDWord($E44C,(AsusSPDValueD And $FFFFF6FF) Or $100);
        End;

    5 : Begin
          Port_WriteByte($2E,$87);
          Port_WriteByte($2E,$87);
          Port_WriteByte($2E,7);
          Port_WriteByte($2F,8);
          Port_WriteByte($2E,$F1);
          AsusSPDValueB1:=Port_ReadByte($2F);
          Port_WriteByte($2E,$F1);
          Port_WriteByte($2F,(AsusSPDValueB1 And $E7) Or $10);
          Port_WriteByte($2E,$AA);
        End;

    6 : Begin
          AsusSPDValueB1:=Port_ReadByte($EC80);
          Port_WriteByte($EC80,(AsusSPDValueB1 And $EF) Or $10);
          AsusSPDValueB2:=Port_ReadByte($EC84);
…Show last 152 lines
          Port_WriteByte($EC84,(AsusSPDValueB2 And $EF) Or $10);
        End;

    7 : Begin
          Port_WriteByte($2E,$87);
          Port_WriteByte($2E,$87);
          Port_WriteByte($2E,7);
          Port_WriteByte($2F,8);
          Port_WriteByte($2E,$F0);
          AsusSPDValueB1:=Port_ReadByte($2F);
          Port_WriteByte($2E,$F0);
          Port_WriteByte($2F,(AsusSPDValueB1 And $E7) Or $10);
          Port_WriteByte($2E,$F1);
          AsusSPDValueB2:=Port_ReadByte($2F);
          Port_WriteByte($2E,$F1);
          Port_WriteByte($2F,(AsusSPDValueB2 And $E7) Or $10);
          Port_WriteByte($2E,$AA);
        End;

    8 : Begin
          Port_WriteByte($2E,$87);
          Port_WriteByte($2E,$87);
          Port_WriteByte($2E,7);
          Port_WriteByte($2F,7);
          Port_WriteByte($2E,$F2);
          AsusSPDValueB1:=Port_ReadByte($2F);
          Port_WriteByte($2E,$F2);
          Port_WriteByte($2F,(AsusSPDValueB1 And $FC) Or 1);
          Port_WriteByte($2E,2);
          Port_WriteByte($2F,Port_ReadByte($2F) Or 2);
          Port_WriteByte($2E,$AA);
        End;
  End;
End;

Procedure EnableAsusSPD;

Type
  asusidrec=Record
    id : String[10];
    m  : Byte;
  End;

Const
  asusid : Array [1..31] Of asusidrec=
  (
    (id:'A7V266MX';  m:0),  // no need to enable anything
    (id:'-A7V266-E'; m:5),
    (id:'-A7V266-M'; m:5),
    (id:'-A7V266';   m:5),
    (id:'A7V333';    m:7),
    (id:'3V4X';      m:1),
    (id:'UV4X';      m:4),
    (id:'CUBX';      m:3),
    (id:'USL2';      m:5),
    (id:'CUC2';      m:5),
    (id:'P3B' ;      m:3),
    (id:'WEM' ;      m:5),
    (id:'-CUW' ;     m:5),
    (id:'<<CUW>>' ;  m:5),
    (id:'K7V' ;      m:2),
    (id:'A7V' ;      m:2),
    (id:'A7P' ;      m:2),
    (id:'A7M' ;      m:2),
    (id:'CUR' ;      m:6),
    (id:'P3C' ;      m:5),
    (id:'UEP2';      m:5),
    (id:'TUEG';      m:5),
    (id:'-MEW-' ;    m:5),
    (id:'<<MEW>>' ;  m:5),
    (id:'-P3W-E' ;   m:5),
    (id:'<<P3W>>' ;  m:5),
    (id:'CUSI';      m:5),
    (id:'CUV2';      m:5),
    (id:'A7S' ;      m:5),
    (id:'CUPL';      m:4),
    (id:'<P4B>';     m:8)
  );

Var
  i : Integer;
  s : String;

Begin
  AsusSPDMethod :=0;
  AsusSPDValueB1:=0;
  AsusSPDValueB2:=0;
  AsusSPDValueD :=0;

  If FindSysBIOSString(0,$FF00,'ASUSTeK')<>$FFFF Then
  Begin
    s:=AwardMotherboardID;

    For i:=Low(asusid) To High(asusid) Do
    If Pos(asusid[i].id,s)<>0 Then
    Begin
      AsusSPDMethod:=asusid[i].m;
      Break;
    End;
  End;

  If AsusSPDMethod<>0 Then EnableAsusSPDSub(AsusSPDMethod);
End;

Procedure DisableAsusSPD;

Begin
  Case AsusSPDMethod Of
    1 : Port_WriteDWord($E44C,AsusSPDValueD);
    2 : Port_WriteByte($E44D,AsusSPDValueB1);
    3 : Port_WriteByte($E437,AsusSPDValueB1);
    4 : Port_WriteDWord($E44C,AsusSPDValueD);

    5 : Begin
          Port_WriteByte($2E,$87);
          Port_WriteByte($2E,$87);
          Port_WriteByte($2E,7);
          Port_WriteByte($2F,8);
          Port_WriteByte($2E,$F1);
          Port_WriteByte($2F,AsusSPDValueB1);
          Port_WriteByte($2E,$AA);
        End;

    6 : Begin
          Port_WriteByte($EC80,AsusSPDValueB1);
          Port_WriteByte($EC84,AsusSPDValueB2);
        End;

    7 : Begin
          Port_WriteByte($2E,$87);
          Port_WriteByte($2E,$87);
          Port_WriteByte($2E,7);
          Port_WriteByte($2F,8);
          Port_WriteByte($2E,$F0);
          Port_WriteByte($2F,AsusSPDValueB1);
          Port_WriteByte($2E,$F1);
          Port_WriteByte($2F,AsusSPDValueB2);
          Port_WriteByte($2E,$AA);
        End;

    8 : Begin
          Port_WriteByte($2E,$87);
          Port_WriteByte($2E,$87);
          Port_WriteByte($2E,7);
          Port_WriteByte($2F,7);
          Port_WriteByte($2E,$F2);
          Port_WriteByte($2F,AsusSPDValueB1);
          Port_WriteByte($2E,$AA);
        End;
  End;
  AsusSPDMethod:=0;
End;

Astra32 mail:

From: RusH
Date: Tue, 3 Apr 2007 11:21:25 +0200
Subject: Re: ASTRA32 uninstall
To: Support <support@sysinfolab.com>

On 4/3/07, Support <support@sysinfolab.com> wrote:
> Hello,
>
> Sunday, April 1, 2007, 8:09:43 AM, you wrote:
>
> cgc> SMBus probing is too aggresive, it breaks Asus boards (A7V133
> cgc> for example) = computer cant succesfully reboot, it hangs.
>
> Thank you for the bug report.
> Please send astra32.log file from 'My Documents' folder.

I dont have one, I allready uninstalled, but I can tell you what was
wrong (and can test fixed binary if you like)

> cgc> On the other hand you use some hack to enable SPD readout on
> cgc> this board, I would love to know what it is to backport it to lm-sensors.
>
> You can see this method in the BIOS.

Yes, I digged to it in the mean time (gpios are defined in the ACPI DSDT).

Back to problem with astra. To enable SPD readout you flip bit 0 in
0xe44d to 1 - that switches asus smbus mux to spd channel, but you
forget to switch it back to 0 and the board cant reboot properly ( I
know this because when I scan smbus before running astra I see only
hwmonitor, after running it I see only spd roms). No idea why the
board doesnt like it, maybe bios has to talk with sensor/clock chip
(both of them have watchdogs) and expects it on the smbus without
making sure mux is set properly.

Open Source AT&T Globalyst/NCR/FIC 486-GAC-2 proprietary Cache Module reproduction

Reply 4 of 4, by shevalier

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Thanks for the solution.
Micron flashed perfectly, Hunix - it turns out that already in those years the first 128 bytes were locked for writing.
But, no luck.
124MHz FSB - ok, 133 - or RAM error, or no detect 1 stick.
Moreover, at any voltage - 3.4 / 3.5 / 3.65 Volts.
Need to look for and select other RAM sticks.

Aopen MX3S, PIII-S Tualatin 1133, Radeon 9800Pro@XT BIOS, Diamond monster sound MX300
JetWay K8T8AS, Athlon DH-E6 3000+, Radeon HD2600Pro AGP, Audigy 2 Value

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