Reply 20 of 21, by Deunan
The2Faces wrote on 2024-03-02, 00:06:I had the same thoughts about the GAFDDC and I really really hope that this chip is not toast. Just for the reason, that it is nearly impossible to source it new to replace with an FPGA without the help of EPSON.
FPGA would be an overkill (and any modern FPGA would require voltage translators for I/O since none can work with 5V signals directly). This is a PLD and a bit starved for resources it seems.
The datasheet is great, nice find. As you can see Epson apparently didn't have enough gates or routing flexibility in the PLD to create all the clock divisor chains they needed, so instead they require two clock sources. RTC SQW is a square wave output of the RTC crystal, usually directly so at 32768 Hz but some RTC chips might have divisors for that as well. This clock controls motor-on timing. Then there is 1 MHz clock input from the data separator chip which controls the rest of the logic.
I think you've mentioned the motor turns on, and the busy/in-use LED as well? In that case the GAFDDC can't be completly dead. So it's a safe assumption it has power and correct reset signal. So I would now focus on the 1 MHz clock signal - is it present? This can be somewhat tested without a scope as well, a typical clock is 50% duty cycle so a volt meter should show roughly 1/2 of the I/O voltage at the clock pin, in this case about 2.5V. Anything above 3.5V and below 1V would be very suspicious. Check the RTC SQW clock input as well, in case motor on/off events are fully software/CPU doing.
The datasheet shows some inverter gates driving the stepper motor 4 coils but I don's see such chips in your machine, I still think it's done with the nearby transistors. But, since GAFDDC has two separate sets of these outputs rather than use daisy-chain with drive select signals, it's very unlikely these are all dead. You should still check the voltage on stepper motor connector, pins 1-4, but in general focus on the clock signals.