Horun wrote on 2020-10-11, 02:13:
Hehee good way to explain it ! Have a S3 VLB with two diff speed sets of ram and it never gives me issues but am running it at 33Mhz bus, if I ran it at 40Mhz (it is rated for that) would probably have to add 1 wait state since the add-on ram is 10nS slower than the soldered...or maybe not.
Most likely not. Modern video cards (like ET4000, CL-GD542x, S3 stuff) have a dedicated memory or system clock that is used to generate memory timings. The memory speed requirements thus does not depend on the bus frequency. Older video cards (like CGA, EGA, classic VGA) have the memory clock derived from the dot clock, and fixed time slots the CPU may use to access the video memory. No matter what the bus speed is, the card wait states to the bus cycle until a memory access slot is available, and then runs the cycle at dot-clock derived speed. It uses the IOCHRDY line on the ISA bus to delay the bus until the memory is cycle is finished.
As a side note: The CGA in high-resolution text mode needs all memory access time slots to properly display the screen. But on the other hand, it may not add that many wait states that the processor can access the memory during horizontal retrace. The display period (from first to last character) is around 45 microseconds, but you may not have bus cycles exceeding 10 microseconds (that what some spec says) to not disturb the memory refresh happening every 15 microseconds. The IBM PC/XT is unable to refresh memory during an active bus cycle (and that includes wait states during a cycle), because refresh cycles are also sent via the same bus.