@udam_u
Cyrix 5x86-100
Stepping 1
Revision 3
Fabbed 44th week of 1995
Cyrix 5x86-120
Stepping 0
Revision 5
Fabbed 50th week of 1995
It could be that the stepping/revisions numbers do not cross over between different speeds of the 5x86, that is to say that maybe stepping 0, rev5 of the 120 part contains improvements that the 100 unit doesn't.
For the 120 part to pseudo-work with branch prediction, LOOP and RSTK must be off, but BWRT can be on, unlike for the 100 part that needs all three of these registers off. The 120 eventually crashes with branch prediction on, unlike the 100 unit. But at 100 Mhz, with BTB (branch prediction) on, it is not faster than the 120 Mhz unit with all over enhancements on (except BTB).
I beleive that may be part of the reason why Cyrix allegidly sent all their 5x86-133 products to upgrade unit companies, that is, so that the upgrade companies would be responsible for up regulating the voltage to 3.7V. My motherboards all have 3.7V settings now :)
@Tetrium
Agreed for the most part, but they did have a 7 week run of the 133 Mhz cpu based on what cpushack mentioned on cpuworld. From what I've read, Cyrix's CEO pushed their engineers quite hard, so I wouldn't be terribly surprised if a slight modification as made. We've definately made such last minute component mods in less time where I work -- but sending stuff to/from China is cheap these days, maybe not so in the US back in 1995/6? The revision numbers of the chips may shed some light onto this.
Without getting into the register moding programs, an easy way for you to check the revision number of your Cyrix 5x86-133 is likely with a program that you already have. Its called ckcpu16, or sometimes chkcpu. Let me know if you don't have it. I've noticed people in this forum generally use it to check cpu, bus, and CPUID information. The Cyrix 5x86's I have do not have CPUID enabled (apparently some do?), but chkcpu still lists the registers that mention the model/stepping, you just need to decode it a little.
Example 1.1
For a Cyrix 5x86-120 chkcpu reports,
DIR0=2Dh
DIR1=5h
The 'h' just means that the number is in HEX. The 2D in DIR0 means that the cpu is intended to run with a 3X multiplier. If you have a real 4X Cyrix 5x86, DIR0 should be 2E, or 2C. FYI, 28 and 2A are for 1x, 29 or 2B are for 2x, 2D or 2F are for 3x.
For DIR1, convert the number to binary and associate the first 4 bits with the revision, and the last 4 with the stepping. For example, 5 (HEX) = 00000101 (BIN). The first 4 bits are 0101 (BIN), which is 5 in DECIMAL. This is the Revision. The next 4 bits, 0000 is still 0 in DECIMAL. This is the Stepping.
Example 1.2
For a Cyrix 5x86-100 chkcpu reports,
DIR0=2Dh
DIR1=13h
DIR0, still 3x.
DIR1, 13 (HEX) = 00010011 (BIN). 0011 (BIN) = 3 (DEC). Revision 3. 0001 (BIN) = 1 (DEC). Stepping 1.
There is a small possibility that your 4X unit is in 3X mode that you will need to enable it to 4X via the registers. Cyrix may have left this up to the upgrade companies? I'm speculating. By setting the PMR register, you can set your Cyrix to 2x, 1x, 3x, but the 4x command was ignored on 100/120 Mhz cpus. I tried this already! I was working on a PLL circuit to force an output waveform of 133 Mhz to my 120 Mhz cpu on 3x, but after trying my 120 at 150 Mhz, I determined that these cpus do not overclock well at all, and that this mod may be a waste of my free time. 66Mhz x 2 = 133 Mhz also failed.