It's kinda true. Some ali chipsets were bugged so they could cache only 128MB and some not I think (can't check myself, all my ali boards are with the older version)
Anyway, you can work around this by installing a cpu which has it's own L2 cache. These are all AMD cpu's:
K6-3
K6-2+ and
K6-3+.

Use any of these 3 and you got no cacheable area limits anymore 😉

It depends on the chipset, but yes, Aladdin V boards will only cache 128MB RAM with 512K L2. And yes, performance will suck if you install more than 128MB, especially since Windows tends to use the highest memory addresses first.

The good news is, there's an easy way around all that. The K6-2+, K6-III and K6-III+ chips have on-die L2 and aren't affected by the cacheable area of the chipset. The motherboard cache can then either be disabled or used as L3 cache. The only trouble is, some boards won't work properly with the '+' series chips.

K6+ mobo support "guide" 😀
http://web.inter.nl.net/hcc/J.Steunebrink/k6plus.htm

When these CPUs are used some people disable the mobo L2 because it is almost always an impediment to FSB overclocking and it barely affects system performance when the on-die L2 is present.

thanks guyz. yes i can find a k6-2+(k6-3+ is damn rare here), and the board i can most possibly find is gigabyte 5ax, which seems to have no reports of trouble with k6-2+/k6-3+.
the question is, how much difference does the on board cache(now works as L3) make when i install a k6-2+? and if i plug 256mb of ram, will the performance be INCONSISTENT(sometimes fast and sometimes slow)?

Take a look at this benchmark from one of my Super Socket 7 boards:

I have heard that there are boards with 2MB L3 cache which can cache more than 128MB, however take a look at the memory throughput for L2 vs L3 cache!

L3 cache is 2x Ram throughput, whereas L2 cache is 10x that. So once you have a K6 with L2 cache onboard, the amount of L3 is quite insignificant...

I noticed that both my boards give me the occasional "read error, press r to retry" DOS message. It's not a big deal, but I wonder why that is. I use CF cards which work 100% on a Slot 1 system. I tried different IDE controller BIOS options but not much luck.

Haven't yet tested a spindle HDD however. My issue might be isolated to CF. My Iwill board also forgets the BIOS settings although the battery I have is good (works fine on the Slot 1 system). Not sure if there are different batteries for diffferent boards? It's the typical silver button battery which goes into the black holder.

According to my old notes:

Cacheable area.
--------------------------------------------------------------------------------
ALi IV/IV+

One 8-Bit TAG-RAM: 64 MB
Two 8-Bit TAG-RAMs: 512 MB
One 10-Bit TAG-Ram: 256 MB
One 11-Bit TAG-Ram: 512 MB

--------------------------------------------------------------------------------
ALi V

256 kB 2nd-LC - 256 MB
512 kB 2nd-LC - 512 MB

This chipset can also use the external TAG-Ram additional to the internal to extend the area even furthermore (needing more cache memory too), but with this setup, the chipset cannot run 100 MHz anymore.
On early revisions (at least up to Rev. E) the internal TAG-RAM did not work correct. It was disabled and an external TAG-RAM was used instead (at full speed).

--------------------------------------------------------------------------------
ALi 7

This chipset does not contain an interface for an onboard L2-cache.
Boards based on this chipset will not carry any L2-cache.
Either get a L2-equipped CPU or install at least two equal SDRam-Sticks, because the chipset can interleave memory access between them and will run faster.

Here is another AladdinV example:

5u3, can you run cachechk or ctcm7 program with another CPU (without L2 cache on-die) on that board to confirm that Aladdin5 can really cache well above 128MB ?

EDIT: forgot the "with another CPU" bit.

Yes, give me some time to find my k6-2...

Great, thanks! if you find it, first run ctcm7 and if it works ok (is not happy on certain boards), it'll tell you directly if all the 256mb are cached or not.
I'm attaching the programs, in case you or someone still doesn't have tham.

On my Asus P5A rev. 1.04 (Aladdin rev. E, 512k) the board only caches 128MB.

I have another P5A rev 1.06 with a newer Aladdin revision and 1MB cache, which should be able to cache 512 MB. Unfortunately this board is incompatible with the K6+ chips.

is this limitation due to the chipset or mainboard design? or in other words, are all ali5 boards in the same way?

I tested both boards (as per above benchmarks) with ctcm7 and both report cacheable area < memory size.

Mainboard: GA-5AX, revision 5.2
CPU: AMD K6-2 (not + model) 300MHz
Chipset: Aladdin5
BIOS: F4 (latest)
RAM installed: 1 stick of PC-133 256MB

CTCM17A

CACHCHK7

Edit: Speedsys added. I wonder why external clock says 66 MHz? It should say 100 MHz.

noshutdown wrote:

is this limitation due to the chipset or mainboard design? or in other words, are all ali5 boards in the same way?

I think it's the motherboard and not the chipset, seeing that afaik only this particular ASUS board has this problem. I've been wondering as to why this board has this problem myself. Last I recall is I don't own any boards with the later ali chipset so I can't check for myself.

If you want any further reading, I'd suggest browsing through the k6+ forums. Theres quite a lot of practical info to find over there.
Link: http://www.k6plus.com/index.php?name=PNphpBB2

Mainboard: Asus P5A rev. 1.06
CPU: Intel Pentium MMX, 233 MHz
Chipset: Aladdin5, rev. unknown, because its under a glued heatsink. 😒 Probably rev. G
BIOS: 1011 Beta 005
RAM installed: 3x 256MB PC133

1 PROZESSOR- und CACHE-INFO    c't 01/00/ Andreas Stiller V1.7a
2
3Prozessor Timing    : Pentium,Pentium-MMX
4Prozessor CPUID     : GenuineIntel Typ=00 Fam=05 Mod=04 Rev=03 Feat=008001BF
5Prozessor Name      : Pentium-MMX
6Aktueller Takt      : 300.652 MHz,  gemäß Pentium Timer:300.699 MHz
7Primär-Cache (L1)   :   16 KByte,4fach assoziativ
8Sekundär-Cache (L2) : 1024 KByte,direct mapped
9Code Cache (L1)     :   16 KByte,4fach assoziativ
10Hauptspeicher       : 768 MByte, keine Memory holes gefunden
11Cacheable Area L1   : 768 MByte, keine noncacheable Areas gefunden
12Cacheable Area L2   : 768 MByte, keine noncacheable Areas gefunden
13Write Strategie L1  : Write Back, no Write Allocation, linear Fill,Pseudo-LRU
14Write Strategie L2  : Write Back, No Write Allocation, no L2 Flush (wbinvd)
15Dirty Tag L2        : ok
16
17     Datenfluá- und Bus Performance (Hauptspeicher: 00110000h)
18
19     Transfer in 4 GByte Real Mode, no paging, via CPU Integer Unit
20Beste Zeit für  16K MOVSD Cache/Page Hit    :   13.6 µs =>1202.8 MByte/s
21mittlere für "  16K MOVSD (Miss + Hit)      :  151.9 µs => 107.8 MByte/s
22mittlere für "  16K MOVSD (L2 clean)        :  199.8 µs =>  82.0 MByte/s
23mittlere für "  16K MOVSD (L2 dirty)        :  216.5 µs =>  75.7 MByte/s
24schlechteste "  16K MOVSD (misses)          :  221.0 µs =>  74.1 MByte/s
25via FPU         16K FMOVI (misses)          :  185.3 µs =>  88.4 MByte/s
26via MMX         16K MMOVI (misses)          :  166.2 µs =>  98.6 MByte/s
27Blocktransfer    4M MOVSD (misses)          :   51.5 ms =>  81.4 MByte/s
28
29im Mittel bei 1024 KB L2-Cache /DOS (640K)  :  137.8 µs => 118.9 MByte/s
30im Mittel bei 1024 KB L2-Cache /Win (4M  )  :  165.5 µs =>  99.0 MByte/s

Well, what about that? With 1MB and the right revision, Aladdin5 caches the full 768MB! 😀

5u3, please can you tell me -

a) how do I determine the chipset revision number, for my GA-5AX mobo? Both of the Alladin5 chipset chips do not have heatsinks on them. One is marked A1, and the other is marked B1.

b) how did you obtain the results output from CTCM17A, in order to produce your "code text block" for your Vogons post?

Thanks a lot! 😀

Edit:

5u3 wrote:

Well, what about that? With 1MB and the right revision, Aladdin5 caches the full 768MB! 😀

The ebay price on an Asus P5A rev. 1.06 has risen by about 10 euros! 😉 🤣

yeah but the asus p5a seems to suck with k6-2+/k6-3+ cpus... and ali5 boards with 1mb is damn rare to find, what most possibly for me to find is gigabyte 5ax which has only 512k...
can you compare and find how much difference between enabled and disabled onboard cache for a k6-2+/k6-3+ cpu? superpi for example, with 128mb of ram.

The fact that with Slot 1 onwards all Cache was on the CPU and mainboard cache got out the window speaks volumes I believe...

128kb L2 cache is massive. Modern Sempron 64s came with 128kb cache...

In a nutshell once you have a 2+ or 3+ it doesn't matter how much L3 cache you have. So I would focus on finding a 2+ or 3+ cpu and a board that supports it.