Reply 40 of 45, by gerwin
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- l33t
I remembered something from the VIA C3 Samuel 2 Datasheet, Here are some quotes from that document:
wrote:The bus-clock multiplier is hardwired into each VIA C3 Samuel 2 processor chip. ... Actually, it is semi-frozen. A VIA-unique ma […]
The bus-clock multiplier is hardwired into each VIA C3 Samuel 2 processor chip.
...
Actually, it is semi-frozen. A VIA-unique machine specific register allows programming to temporarily change the hard-wired multiplier. This capability, documented in Appendix A, is intended for special BIOS situations and test and debug usage.
...
BUS CONTROL REGISTER 2: Certain bits in BCR2 register are used to program the processor’s clock multiplier.
...
BIT 19: ESOFTBF - Enables Software Clock Multiplier
BIT 26:23: CLOCKMUL - Software Clock Multiplier
It is a bit like the AMD K6-III+ and K6-2+ software multiplier. Potentially very practical, but only when there is a DOS tool to configure this.
wrote:On Socket 7 in DOS ALI Aladdin V is faster in low resolutions (like 3DBENCH) but VIA MVP3 is faster than Aladdin V in higher resolutions with all CPUs.
K6-III+ and K6-2+ (6x86MX too?) support write combining tof the LFB (MTRRLFBE), which makes all the difference in Vesa high res speed, together with the FSB speed that is.
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