feipoa wrote:

Upsidedown image? You just fixed it!

That baby should be able to handle 75x3.5 (262 MHz) at 2.9 V, and maybe even 83.3x3.5 (292 MHz) at 2.9-3.1 V if you are lucky. My IBM PR333 works well at 262 MHz.

If your motherboard supports Cyrix 4X CPUs, you should be able to run it at 4x66 (266 MHz)

Why would you run it at anything other than the highest bus speed your motherboard allows? Doesn't raising the bus speed increase performance more than raising the CPU clock speed alone?

For fun! Specifically, to see how far these CPUs can go in terms of internal frequency. Anything above 250 MHz is overclocked on this processor. Some system boards may also be more stable at 66 Mhz.

Doesn't raising the bus speed increase performance more than raising the CPU clock speed alone?

Benchmark results seem to indicate that it depends on the application, however on average, there seems to be a cross-over at a certain frequency (like supply and demand curves). Maybe when/if I finish the Ultimate 686 Benchmark Comparison, I'll chart-out some of these curves.

feipoa wrote:

Upsidedown image? You just fixed it!

That baby should be able to handle 75x3.5 (262 MHz) at 2.9 V, and maybe even 83.3x3.5 (292 MHz) at 2.9-3.1 V if you are lucky. My IBM PR333 works well at 262 MHz.

If your motherboard supports Cyrix 4X CPUs, you should be able to run it at 4x66 (266 MHz)

Huh, so your IBM PR-333 handles higher clocks better than your Cyrix PR-366? (didn't you mention not being able to get 2.5x100 working stable and dropped back to 4.5x66=233?)

Is this generally true for all of the IBM parts? (I'd read that IBM had higher standards for grading, and I know the IBM 5x86s tend to overclock well, but I haven't seen much info on this for the 6x86)

feipoa wrote:

For fun! Specifically, to see how far these CPUs can go in terms of internal frequency. Anything above 250 MHz is overclocked on this processor. Some system boards may also be more stable at 66 Mhz.

Doesn't raising the bus speed increase performance more than raising the CPU clock speed alone?

Benchmark results seem to indicate that it depends on the application, however on average, there seems to be a cross-over at a certain frequency (like supply and demand curves). Maybe when/if I finish the Ultimate 686 Benchmark Comparison, I'll chart-out some of these curves.

Some CPUs may also have FSB stability limitations that will cause problems at higher bus speeds in general and/or at higher core clock speeds. (ie some CPUs may actually be stable at higher core clocks when the FSB is lower)

OTOH, it would also be interesting to see how well various CPUs coped with higher bus speeds (with or without core speed overclocking), but that would also complicate testing further. (even more variables to add and more time spent testing in each configuration)

OTOH, some particular speeds introduce other problems with board stability and/or peripheral stability due to overclocking the chipset (ie 75 or 83 MHz on a 66 MHz rated chipset) or running the PCI/AGP buses out of spec. (ie 75 or -especially- 83 MHz with PCI divider at 2 and AGP at 1, or >100 MHz with divider at 3 -relatively few boards support a 1/4 PCI divider, and few to none that are generally good quality board in all other respects -plus, you'd be overclocking all those 100 MHz rated SS7 chipsets too)

I found an interesting document for the VIA Cyrix III Joshua design:
http://datasheets.chipdb.org/VIA/Joshua/cyrix3db.pdf

Its not mine, but there is a non-oem (whitebox) cyrix 180 gx processor/board on ebay for a relatively reasonable price: http://www.ebay.com/itm/290753567104

the only fly in the ointment is, the bios chip looks removed...

luckybob wrote:

Its not mine, but there is a non-oem (whitebox) cyrix 180 gx processor/board on ebay for a relatively reasonable price: http://www.ebay.com/itm/290753567104

the only fly in the ointment is, the bios chip looks removed...

Its bricked unless someone has the rom and a blank bios eprom its just a paperweight. Note that it looks like the cooler is gone as well. Those bga style Media GX all were sold with coolers already mounted.

I'm not going back through 8 pages to see if anyone posted it yet but if anyone is interested in seeing some Cyrix benchmark scores, there's some in this review of the MII-433 run against a Celeron 333 for comparison.

http://www.pcstats.com/articleview.cfm?articleid=1187&page=1

sliderider wrote:

I'm not going back through 8 pages to see if anyone posted it yet...

Neither am I, but I think it was brought up here; I know I've read through that link once or twice. The Ultimate 686 Benchmark Comparison includes data for a Cyrix MII up to 400 MHz as well as a Celeron at 300 and 400 MHz.

feipoa wrote:

sliderider wrote:

I'm not going back through 8 pages to see if anyone posted it yet...

Neither am I, but I think it was brought up here; I know I've read through that link once or twice. The Ultimate 686 Benchmark Comparison includes data for a Cyrix MII up to 400 MHz as well as a Celeron at 300 and 400 MHz.

Yes, it was brought up several times. Also pointed out was the less than ideal motherboard used among other things. (and maybe some that weren't mentioned)

He used an SiS based SS7 board (Asus P5S-B), which was among the slower/weaker SS7 chipsets (which already weren't stellar comped to contemporary Intel chipsets -even LX- and the better VIA Slot-1/S370 examples).
No K6-2s or IIIs compared either, so missing the more foolproof apples to apples comparison too. (ie CPU being only variable)

On top of that, he compared used an overclocking comparison without attempting higher FSB speeds on the MII, so the Celeron got a 50% RAM and core speed boost while the MII just got the multiplier bumped and RAM/L2 stuck at 100 MHz, on top of the slow chipset. (from what I recall in old archived forum discussions, even pushing the SiS boards to 133 MHz wouldn't match DRAM performance of good-quality Aladdin V or MVP3 boards running at stock 100 MHz, and even those boards were still -usually- well behind their BX counterparts, more in the range of 66 MHz BX or LX bandwidth -benchmark/application dependent)

That said, it should also be noted that, even under good conditions, the MII's integer computational performance (dhrystone) wasn't much (or at all) ahead per-clock compared to the PII/III/Celeron (though it shouldn't be lagging behind like in that article).
The MII's (M1's) advantages were never in raw integer (or floating point) computational performance, but of a combination of design features that resulted in strong application performance in certain integer/memory/logic/cache intensive operations. (the L1 cache performance was always strong, and I/O performance was strong by S7 standards -consistently ahead of AMD, though the P55C benches faster for RAM, at least in Sandra)

The gold standard for this was the Cyrix winstone scores, along with some similar benchmarks (though winstone was the most trusted/respected of them iirc). Unfortunately winstone wasn't able to be included in the ultimate 686 benchmark comparison. (iirc noone could find a working copy/image of it of the right vintage)

And even so, Cyrix was also getting sloppy (or desperate) with the PR values used for those late model MIIs. (the 300s really should have been marked as 266s -along with the 2.5x86 MHz model; the 333s should have been 300s, the 366 should have been 333 -or maybe 350, the 400 should have been 366 or 380, and the 3x100 MHz 433 probably a PR 400 at best)

Does anyone know if it's possible for a Cyrix 5x86 to support a 3.5x multiplier?

sliderider wrote:

Does anyone know if it's possible for a Cyrix 5x86 to support a 3.5x multiplier?

I can say with a large degree of confidence, no. Not even the MediaGX had non-integer multipliers. Is this a trick question? Is there a defective Cyrix 5x86 out there with a ~3.5x multiplier? Were there some engineering samples whereby Cyrix wanted to run their 5x86-120's at 117 MHz to avoid PCI issues at 40 MHz?

kool kitty89 wrote:

The gold standard for this was the Cyrix winstone scores, along with some similar benchmarks (though winstone was the most trusted/respected of them iirc). Unfortunately winstone wasn't able to be included in the ultimate 686 benchmark comparison. (iirc noone could find a working copy/image of it of the right vintage)

I late obtained a copy of Winstone99, but I'm not going to re-run 170+ CPUs to get it on the charts. The Ultimate 686 Benchmark Comparison is pretty much finished for data collection. Now I just need to find the mood to analyse the data. There is a guy who might get around to cross-checking the P66/60 scores I synthesized. I would also like to bench the K6-III 400 and 450 on the 430TX board. It is currently only benched on a Super7 board.

No, just wondering about something. If you had a Cyrix 5x86 133 and put it on a 40mhz bus with 3.5x multiplier then you'd have 140mhz, which might be doable if you found a magic chip and the bus speed increase would show big gains over the normal 33 x 4.

I have found 40 Mhz to be somewhat problematic with single-banked 512K cache. For most boards, I need to drop the cache timings down to the slowest setting to maintain stability. However, the slowest cache settings also seem happy to run at 60 and 66 Mhz, so running a Cyrix 5x86 at 2x60 and 2x66 is probably preferred to a mystical 3.5x40.

While my Cyrix 5x86 33x4 has been running 24/7 for over a year, I wouldn't want to push it past 133 Mhz. I had to disable the DTE feature for it to be stable with NT4. DTE is normally an on by default feature, but doesn't see to have much effect on performance. It took weeks to figure out the DTE issue; the computer will run with it enabled for days and appear fine, but would eventually freeze. I had to go feature by feature until I found the culprit of my system hangs. The fact that I had to disable it leads me to think that 133 Mhz is reaching the ceiling for long-term stable operation. The IBM 5x86 doesn't seem to mind DTE at 133 MHz though. The IBM chip is also fairly happy with branch prediction at 133 MHz, unlike my 33x4 chip.

feipoa wrote:

I have found 40 Mhz to be somewhat problematic with single-banked 512K cache. For most boards, I need to drop the cache timings down to the slowest setting to maintain stability. However, the slowest cache settings also seem happy to run at 60 and 66 Mhz, so running a Cyrix 5x86 at 2x60 and 2x66 is probably preferred to a mystical 3.5x40.

While my Cyrix 5x86 33x4 has been running 24/7 for over a year, I wouldn't want to push it past 133 Mhz. I had to disable the DTE feature for it to be stable with NT4. DTE is normally an on by default feature, but doesn't see to have much effect on performance. It took weeks to figure out the DTE issue; the computer will run with it enabled for days and appear fine, but would eventually freeze. I had to go feature by feature until I found the culprit of my system hangs. The fact that I had to disable it leads me to think that 133 Mhz is reaching the ceiling for long-term stable operation. The IBM 5x86 doesn't seem to mind DTE at 133 MHz though. The IBM chip is also fairly happy with branch prediction at 133 MHz, unlike my 33x4 chip.

Is yours a 133mhz chip to start with or are you overclocking? What kind of cooling are you using?

The chip I am refering to here is an origianl Cyrix 5x86-133/4x from the first production run at 133 MHz. Image of the actual chip is attached.

I am using a stock 486 heatsink with a replacement fan, which seems to blow a little harder than the stock ones. I have a large recirculation fan in the case, with 1 double-wide slot fan next to the Matrox heatsink, and a single-wide slot fan on the first slot. Without much intake venting on a 486 case, these 3 extra fans do not do a whole lot, I think. They are grabbing air from the 5.25" floppy hole, the CF card hole, and the slits between the 3.5" floppy drive, 5.25", and DVD-Drive and the case. Quite a bit of dust accumulates in these areas, so this must be where the air is coming from.
It is the right-most case in this link,
The World's Fastest 486

It seems like I tried DTE at 120 MHz and it didn't have a problem, but this was a long time ago.

Do the 4x chips supports other multipliers or are they only 4x? I'm just wondering about the 120mhz 4x chip with 30mhz bus. The only machine I know of that used a 30mhz bus was a Compaq model and AMD even made 486dx4 90 just for that machine.

sliderider wrote:

Do the 4x chips supports other multipliers or are they only 4x? I'm just wondering about the 120mhz 4x chip with 30mhz bus. The only machine I know of that used a 30mhz bus was a Compaq model and AMD even made 486dx4 90 just for that machine.

I have other 2 other 5x86 which which are 4x capable. One is Cyrix-branded, the other is ST-branded. They both do not like 133 Mhz and were intended for 100 Mhz.

I suspect the 5x86-120/4x chips were failed 5x86-133/4x chips. I am not sure if they were specifically targeting the one Compaq machine with a 30 MHz bus. What model Compaq was that?

I've run the 4x chips at 3x and 4x by motherboard jumper and 2x via accessing the chip's registers. There is also a register option for 1x, but either I didn't try it or it didn't work. Here is an excert from the BIOS Writer's Guide.

The CLK(1-0) bits can be used to change the internal core frequency relative to the bus frequency at any time. Any attempt to modify the core frequency higher than specified for the device will be ignored. These bits are initialized, during reset, to the clock multiplier specified by the CLKMUL pin (2X, 3X, etc.). The following core/bus frequency ratios are available:

CLK(1-0) = 00: 1/1
CLK(1-0) = 01: 2/1
CLK(1-0) = 11: 3/1
CLK(1-0) = 10: 4/1 (not available on production parts)

After reset, these bits reflect the current operating core/bus frequency. If the current core/bus frequency is 2/1 or 3/1, the mode can only be changed to 1/1 and then back to 2/1 or 3/1. If the mode after reset is 4/1, the mode can be changed among 4/1, 2/1 and 1/1.

feipoa wrote:

I have other 2 other 5x86 which which are 4x capable. One is Cyrix-branded, the other is ST-branded. They both do not like 133 […]
Show full quote

sliderider wrote:

Do the 4x chips supports other multipliers or are they only 4x? I'm just wondering about the 120mhz 4x chip with 30mhz bus. The only machine I know of that used a 30mhz bus was a Compaq model and AMD even made 486dx4 90 just for that machine.

I have other 2 other 5x86 which which are 4x capable. One is Cyrix-branded, the other is ST-branded. They both do not like 133 Mhz and were intended for 100 Mhz.

I suspect the 5x86-120/4x chips were failed 5x86-133/4x chips. I am not sure if they were specifically targeting the one Compaq machine with a 30 MHz bus. What model Compaq was that?

I've run the 4x chips at 3x and 4x by motherboard jumper and 2x via accessing the chip's registers. There is also a register option for 1x, but either I didn't try it or it didn't work. Here is an excert from the BIOS Writer's Guide.

The CLK(1-0) bits can be used to change the internal core frequency relative to the bus frequency at any time. Any attempt to modify the core frequency higher than specified for the device will be ignored. These bits are initialized, during reset, to the clock multiplier specified by the CLKMUL pin (2X, 3X, etc.). The following core/bus frequency ratios are available:

CLK(1-0) = 00: 1/1
CLK(1-0) = 01: 2/1
CLK(1-0) = 11: 3/1
CLK(1-0) = 10: 4/1 (not available on production parts)

After reset, these bits reflect the current operating core/bus frequency. If the current core/bus frequency is 2/1 or 3/1, the mode can only be changed to 1/1 and then back to 2/1 or 3/1. If the mode after reset is 4/1, the mode can be changed among 4/1, 2/1 and 1/1.

So if you had a 120/4x and wanted to run it at 60 x 2, how would you even start it? If you have to boot it at 3x or 4x to make the changes you say you'd burn it up.

sliderider wrote:

So if you had a 120/4x and wanted to run it at 60 x 2, how would you even start it? If you have to boot it at 3x or 4x to make the changes you say you'd burn it up.

You need to boot it at 3x with a 33 MHz or 40 MHz FSB setting, adjust the CPU register to 2x, then set the FSB to 60 MHz. Depending on your FSB jumper configuration, you could probably use a single pole, double throw or, double pole, double throw switch.

Alternately, you could study up on how to modify/program your BIOS to write directly to the Cyrix's registers. If you did that, maybe you could have a BIOS setting for 1x, 2x, 3x, or 4x. The M919's BIOS is one of the few I've seen which has user-adjustable settings for 2 of the 5x86 features, LSSER and Linear Burst modes. The same concept would apply to modifying the CLKMUL register.

Is there a difference between a 6x86MX PR300 and an MII PR300?