VOGONS


First post, by RacoonRider

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Here is the target system.

Notice the DIP socket for TAG RAM upgrade below. According to the manual, this is used to extend cacheable RAM from 64 MB to 512MB.

P1000626.jpg

I don't officially need to use it since I only have 64MB RAM. But what happens if I put there a 128K-12ns cache module from a random 430FX board I have here?

Here are the results of different benchmarks:

12ns.jpg

As you can see from here, there is hardly any advantage in using 12 ns TAG RAM when running the system at 66 Mhz, while at 75 Mhz it gives somewhat better results: 2%-7% improvement in Sandra, 1,6% improvement in Super Pi and no improvement in Speedsys (weird, isn't it?). Topbench results are also better, but there is way too much enthropy to judge.

It turns out that built-in 256-15 TAG RAM can't cope with 75Mhz bus:

1/15ns=66.666Mhz
1/12ns=83.333Mhz

To prove this point, I inserted 256-20 chip (1/20ns=50Mhz). There's a weird 2% performance increase in CPU benchmarks. But it can't handle anything more than 50Mhz bus, so in memory benchmarks it results in very significant performance drop.

Still, it does not affect speedsys results and I can't understand, why.

Conclusion:

Onboard TAG RAM is designed to work only with documented 60 and 66Mhz bus speeds. When it comes to overclocking a descent motherboard to higher bus speeds, it is preferable to upgrade the TAG RAM with the chip that can cope with higher FSB: 12ns for 83Mhz, 10ns for 100Mhz FSB.

If you have an empty DIP socket and a chip to fit into it, you can squeez some extra 1-7% speed from your system.

Reply 1 of 5, by elianda

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What are your memory and Cache timing settings in BIOS?
Have you increased the cacheable area setting to 512 MB when the Tag RAM was plugged?

I still don't understand why it gets faster just by increasing Tag RAM Bit width while keeping the same main memory amount.

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Reply 2 of 5, by RacoonRider

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I don't get it either. BIOS settings were kept the same:

DRAM Read Burst Timing: x222
DRAM Write Burst Timing: x222
RAS to CAS delay: 2T
DRAM leadoff timing: 7T/6T
Turbo read leadoff disabled
Speculative leadoff enabled
Turn-around insertion disabled
Turbo read pipelining disabled

I used 64MB 60ns EDO RAM in 4 sticks all the time.

Reply 3 of 5, by feipoa

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Interesting. I think Sandra naturally has a 2% variance.

Don't you need to account for some margin of error in the cache speed and overall timing?

It seems like, for example, that
12 ns cache would be a safe bet for 66/75 MHz
10 ns for 83 Mhz
8 ns for 100 Mhz

Plan your life wisely, you'll be dead before you know it.

Reply 5 of 5, by feipoa

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swaaye wrote:

I looked up the 430HX PDF and it specifies 15ns tag RAM at 60-66 MHz.

Ok. I suppose any motherboard-imposed wait states could be adding the required slack.

Plan your life wisely, you'll be dead before you know it.