man, Pentium pro overdrives are AWESOME chips... Something doesn't sit right with me on the quake 1 results though. I'm going to run that once more and double check. for some reason not only are those chips WINNING but beating chips 2x as fast in mhz. honestly i'd expect to see them just under the p2 xeons.
unless quake 1 dos loves p2-overdrives...
I'm really wondering about this too. Those PII Overdrive figures seem REALLY high relative to PII/PIII/Xeon. (they're essentially the same core architecture, just with different cache and FSB arrangements, as such I'd have thought the PII Overdrive would be a little below PII Xeon of similar clockings)
Though it's also interesting that the MII fared almost identially to the K6 and K6-2 at similar FSB/core clock speeds. (with the weaker FPU, I'd have thought the K6 would have more of an edge . . . then again, Quake 1 is REALLY P5 optimized, and the M2 might end up catering more to the programming quirks of P5 than the K6 does)
On another note, I just noticed how amazingly fast the Cyrix CPUs are at Doom, though the K5 does even better anbd K6 fairs pretty well. The P5 based chips make out pretty well too, behind the AMD and Cyrix offerings, but still in the ballpark. The P6 core based chips do really bad there though, at least compared to the typical integer performance for later benchmarks. (the PII overdrives are way down there too, in stark contrast to the Quake 1 trials)
The Winchip doesn't do great either, but it's not terrible considering it's closer to a Cyrix 5x86 or 486 internally (or Media GX -though the GX itself is really I/O bound), but the VIA Cyrix/C3 chips seem to be the worst by far.
It's really interesting to compare the pre-pentium optimized software in general, among other things it points out more how the later chips did their own execution optimization internally, rather than relying more on compiler/programmer optimized scheduling. (though it also points out how well performnace was improved in the specific areas commonly used in old software -granted, integer computationally intensive 3D/pseudo 3D games compared to old business apps and such, or plain 2D games)
Too bad games like X-Wing, TIe Fighter, or Wing Commander III aren't convenient to use for benchmarks like Quake or Doom. It would be interesting to see how things compared for the last generation of non-pentium non-FPU specific top-teir polygonal 3D games.
On the note of the C3 being weak . . . in general it seems really poor for both multimedia/game and general performance. It really makes me wonder why VIA even chose that chip over the MII based projects (like the Cayenne core used in the original Joshua Cyrix III) brought over from Cyrix. WIth the Joshua design apparently having somewhat better clock scaling than older MII derivatives combined with the big L2 cache, much improved FPU, and added 3DNow! it should have easily managed better than 2x (maybe more than 3x) the per-clock performance of the C3 based stuff. Hell, and if yields, power consumption, and die sizes were a problem, cutting back the cache size should have addressed that a good bit. (given how well the old MII already fares next to the C3, and given the C3's modest cache itself, cutting down the Joshua core's cache should have been pretty reasonable)
There was also the WIP Jalepeno (M3) core design Cyrix was working on before the VIA buy-out, which might have made a really nice follow-on had VIA not cut that team in their downsizing. (granted, a risk given the incomplete nature of the project, but had it eventually made it to market, it should have been massively more capable than the Centaur based designs and more on the level of K7, and like the M2 in terms of IPC rate but with other improvements and MUCH more emphasis on clock scalability, including an 11 stage pipeline -which is one reason it sometimes gets confused with the WinchipIV based design VIA eventually did use)
Reading old articles from '98 and '99 about that NS/Cyrix stuff, aside from the typical "NS bureacratic management bloated and ruined Cyrix" there's the more specific issue of how heavily they seemd to be investing in SoC designs. None of that seemed to pay off, and with the lukewarm success of the Media GX itself, it really makes me wonder why they retained such a high emphasis on that end of R&D. (as it is, it seems kind of a waste that the updated 5x86 core in the Media GX didn't get worked into a S7/SS7 part as a lower-cost complement to the M2 line, and benefitting from the full bandwidth and L2 cache of S7/SS7 -better balanced ALU+FPU+MMX performance than M2 for much better multimedia/gaming performance relative to manufacturing cost, power consumption, or PR rating -which would actually be LOWER than the clock rate like the old 5x86 😉 . . . plus yields and clock speed scaling probably would have fared better than the full M2)