Board came today and POSTs fine thankfully. Very odd, the board has no markings indicating it was made by Tyan, only the BIOS POST screen says such. I also thought Tyan made their boards in the USA and not Taiwan, I guess not. Zero jumper info is slik screened on the board itself. The only markings are "S1437" which I presume is Tyan's model number.

I was bidding on that board. I've wanted one for a while, but since I already have the Super EISA I wasn't willing to pay $100 for it.
What kind of info do you need? The jumpers are on TH99 and I believe the CFG file is available.

There are quite a few undocumented jumpers and no listing for setting the bus speed. What is interesting is that the board came with a DX2/66 and the machine states only a 33Mhz CPU is installed. The NiCE board properly shows 66Mhz and has a pretty much identical BIOS.

Are there more jumpers than what is shown on TH99? According to TH99 jumpers JP26 JP27 and JP28 are the only possible ones that could control bus speed. Should be pretty easy to figure it out.

I can confirm that JP26,27, and 28 control bus speed. I have to verify each setting with software as I don't trust the BIOS readout, but this board seems to support weird bus speeds like 16 and 20Mhz. There were a few settings that didn't boot with a DX2/66 or DX4/100 OD, they could be 50 and 66Mhz, but I have no CPU to verify this.

There's nothing weird about 16 or 20MHz. That was perfectly normal for 486SX chips.

But in any case, if your board is like the NICE it will support the following bus speeds:

16, 20, 25, 32, 33, 40, 50 and probably 66.

Can you post you findings for JP26, 27 and 28? I'm too lazy to figure it out for myself.

I figured it out. I should probably post the results at some point.

I don't believe the information on TH99 for configuring the L2 cache is correct. I can only get the 64k and 256k settings going. The 128k, 512k and 1024k settings all crash the system. My chips are good. I ran them through a tester. Does anyone have a copy of the original manual or anything else that could be of help? I am certain TH99 is not 100% correct, because it states I should use eight 128kx8 chips in bank 0 for 512k and 16 128kx8 chips in banks 0 an 1 for 1024kb. This is not possible as there are only enough sockets for 8 chips in total (4 per bank). There are 9 jumpers to control the cache, and it is too complex to figure out without a chipset datasheet (which I also can't find).

What was the result of contacting Tyan?

The result was "Sorry, We don’t have the manual for this product."

Okay. I believe I have gotten to the bottom of this problem. The jumper settings on TH99 are actually correct. The problem is mostly hardware related.
First of all, in order to use the single bank cache configurations (like 128kb and 512kb) you have to make sure there are only chips installed in bank0. If you leave unused chips in bank1 the system will not finish post. This is the first time I have noticed this behaviour on a 486 board.
Second, this board was designed to take both 300mil and 400mil wide cache chips. For 128kx8 cache chips, there was a time when only the 400mil parts were available. Although it appears this board can take the 300mil 128kx8 chips, two pins in each socket are actually not connected, so you need to bridge them to the pins on the 400mil sockets. It seems like a careless design to me.
Lastly, if you plan on using the AWARD EISA 486 BIOS stolen from the ASUS 486SV1 board, be aware that board only supported up to 512kb cache and the 1024kb setting was not implemented. 1024kb does not function with the SV1 BIOS at all. Maybe it's possible to mod it, but I have no idea at this time. I will look into it.

Perhaps there is one required pin not wired to the chipset?

Since everything works fine with the original AMI BIOS, I am more inclined to blame it on the AWARD SV1 BIOS. That board physically can't accept more than 512kb cache. The BIOS cache detection routine doesn't recognise 1024kb as a valid configuration and the cache is automatically disabled at boot.

Interesting. I guess the "cache detection routine" in the Biostar MB-8433UUD doesn't care that 1024K is not natively supported on that board because my adaption worked without any BIOS trickery.