Pingaloka wrote:

Elianda could you develop a bit on that please? What is the difference? Are there many boards that work this way?
How can L2 cache off increase performance?

thanx

430FX boards with pipeline burst cache was not that common the beginning. Actually it started to be more common after the VX and HX chipsets were released in January 1996. How much performance increase PB cache gives over regular cache is not known, but I dont think it will be more than 1-2 frames pr. second in most games. The VX, HX, TX introduced PB cache directly soldered on the motherboard or they continued the COAST module as also found on the FX boards.

vetz wrote:

Pingaloka wrote:

Elianda could you develop a bit on that please? What is the difference? Are there many boards that work this way?
How can L2 cache off increase performance?

thanx

430FX boards with pipeline burst cache was not that common the beginning. Actually it started to be more common after the VX and HX chipsets were released in January 1996. How much performance increase PB cache gives over regular cache is not known, but I dont think it will be more than 1-2 frames pr. second in most games. The VX, HX, TX introduced PB cache directly soldered on the motherboard or they continued the COAST module as also found on the FX boards.

Thanx vetz. I posted some results I hope they're useful.

Ok some graphs showing up what's going on with the memory:

A) All settings on:

B) Internal cache disabled, External enabled:

C) Internal cache Enabled, External disabled

D) Both caches disabled:

So disabling the L1 also disabled the L2, this can be normal with SRAM cache.

Enabling the L2 lowers main memory throughput considerably, even if L1 is off.
This basically explains the scores.
I would suspect timing settings that apply if the L2 is set enabled.

What are your memory timing settings? Do you use EDO or FPM? Are there extra settings/jumpers for Cache cycles?

Something else from my FX board:

The board allows to set FSB not only 40, 50, 60, 66, but also 16, 20, 25, 33.
With the available multipliers of 1.5, 2.0, 2.5, 3.0 this allows from clocks 24 MHz with 16 MHz FSB to 200 MHz with 66 MHz FSB.
(PCI divider applies 😉 ).

With x4444 memory timings, memory speed goes down to 12 MB/s and CPU score to 1.94.

I use 64mb FPM.
Here are some pictures of Bios settings + Manual (couldn't get better quality pictures for the manual)

Anther weird thing about this board. I put on a 166mhz Pentium MMX, set jumpers to 2.5 clock and 66mhz and the computer reads 167mhz and not 166mhz at boot screen!?

How does the memory graphs change, if you change JP23 ?

Old thread, but I wanted to share my finds of this board. As Elianda stated, cache is SRAM. That explains L2 Off results.
Interesting boad but it seems that it would not be very useful if our purpose is to slow down to achieve 80386 and 80286 speeds.

- CPU: 75/90/100../180 MHZ VR/VRE spec
- Cache: 256K/512K Asynchronous SRAM
- 256K (two piece 32K X 32) Synchronous
- Pipelined burst SRAM
- Provides Write Back