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Reply 100 of 539, by Anonymous Coward

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I noticed the same behaviour in Qbasic and ASM via debug. Not sure how to proceed. None replies to the question I posted on vintage-computer.com.

I'm surprised disabling the keyboard din't work for you. I am pretty sure it worked for me.

"Will the highways on the internets become more few?" -Gee Dubya
V'Ger XT|Upgraded AT|Ultimate 386|Super VL/EISA 486|SMP VL/EISA Pentium

Reply 101 of 539, by NJRoadfan

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Yeah, the keyboard controller in that machine is kinda wonky, the self test command doesn't freeze my P4. If you want to attempt to find the checksum, I have attached a copy of the Tyan's BIOS. Running a diff with the Super EISA BIOS should hopefully reveal where the checksum is stored. Aside from the BIOS ID strings, they should be nearly identical except for the checksum. I'd do it myself, but I don't have an easy way to dump its BIOS at the moment.

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Reply 102 of 539, by Anonymous Coward

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If you run AMISETUP on your Tyan, it should tell you the location of the checksums in CMOS RAM. However, I'm not 100% confident in the accuracy since AMISETUP failed to read the configuration of my CMOS settings correctly. The program was written between 1992 and 1994 and it's supposed to support boards with EISA, but for whatever reason it doesn't work 100% correctly with mine. Maybe it has to do with the location of the NVRAM? Maybe it will work better with your Tyan?

I'm trying to request some outside help with programming the command byte.

"Will the highways on the internets become more few?" -Gee Dubya
V'Ger XT|Upgraded AT|Ultimate 386|Super VL/EISA 486|SMP VL/EISA Pentium

Reply 103 of 539, by NJRoadfan

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Keep in mind that the CMOS checksum is different from the BIOS checksum. A machine will boot with a corrupt CMOS 😜 I tried AMISETUP, it worked about the same as it did for you (not well). The EISA boards likely store their CMOS in the Dallas RTC module with the EISA setup, that would certainly trip something up. Chances are the BIOS is designed to ignore CMOS options that aren't enabled in ROM.

Good to hear about the programming part. The lack of good examples is the stumbling block. I took a peek at PCEm's keyboard controller emulation, and we certainly are on the right track. I should try this programming from within PCEm, at least I can view the registers in real time. FWIW, it loads the Tyan BIOS in and generates the same scary EISA errors the AMI Enterprise III BIOS does.

I should move to playing with this on my 440BX machine (complete with circa 1999 AMI WinBIOS), at least I know its keyboard controller works 100% correctly (the Tyan one might have taken a surge or something). I wouldn't be afraid to ask anyone at AMI about BCP, Hiflex is so long dead that they shouldn't be afraid of anything.

Reply 104 of 539, by Anonymous Coward

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I shot an e-mail to AMI the other day. They basically just ignored whatever I said and offered me AMIBCP8.

"Will the highways on the internets become more few?" -Gee Dubya
V'Ger XT|Upgraded AT|Ultimate 386|Super VL/EISA 486|SMP VL/EISA Pentium

Reply 105 of 539, by NJRoadfan

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I guess they figured that BCP8 is already all over the internet that giving it away is no big deal. I hate it when people don't read e-mail, particularly when you were likely very specific about what version you needed for the core BIOS you are targeting.

Reply 106 of 539, by Anonymous Coward

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I may be onto something. I think for the time being I am at least able to read the command byte. I got a value of 45. That implies mouse enabled, but irq12 disabled.
I tried to enable the mouse IRQ using the same method (with the mouse not plugged in) and nothing changed.
Then I wrote A7h to port 64h, and read the command byte again and got a value of 65...but then the system seemed to lock up. A value of 65 would be consistent with mouse disabled.

I'll try running the program again with the mouse plugged in to see if it makes a difference.

*edit*

Okay, I managed to write A7h to port 64h to disable the mouse port without having the system lockup. I'm actually not sure if the system locks up, it may just be the keyboard controller locking up. The reason that this was happening was because I was running the reads and writes in my program too close together. It seems the kbc needs some kind of extra delay (in addition to the wait loops).

Unfortunately I still can't seem to write the command byte directly without locking up the kbc. I think something in my code is wobly, because I noticed that the first time I try to read from the command byte, it spits out an incorrect value of "FA". If I run the program again i get the correct value of 45. Since I'm basically using the same code for writing the command byte I would assume something similar is happening and screwing up the kbc.

Here's my code to read the command byte. (which seems flaky on the first run)

DO
i = inp(&H64)
LOOP UNTIL i AND &H1
OUT &H64, &H20

DO
i = inp(&H64)
LOOP UNTIL i AND &H2
i = inp(&H60)
PRINT hex$(i)

Here's the code I wrote to write the command byte that seems to lock up the kbc

DO
i = inp(&H64)
LOOP UNTIL i AND &H1
OUT &H64, &H60

DO
i = inp(&H64)
LOOP UNTIL i AND &H1
OUT &H60, &H(insert desired hex code here)

Last edited by Anonymous Coward on 2013-12-05, 12:39. Edited 1 time in total.

"Will the highways on the internets become more few?" -Gee Dubya
V'Ger XT|Upgraded AT|Ultimate 386|Super VL/EISA 486|SMP VL/EISA Pentium

Reply 107 of 539, by NJRoadfan

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I got 45 intermittently, but didn't trust the output. The problem is bit 7 is supposed to be "0" no matter what. Disabling the mouse shouldn't lock up the machine either, I'd expect that from trying to enable the mouse. I'd still like to know why sending the keyboard disable command doesn't work in QBasic, but does work in debug.

Reply 108 of 539, by Anonymous Coward

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I think disabling the keyboard worked for me in QB.

Also, command byte 45 sets bit 7 to 0. I think you're mixing up bit6 and bit7.

"Will the highways on the internets become more few?" -Gee Dubya
V'Ger XT|Upgraded AT|Ultimate 386|Super VL/EISA 486|SMP VL/EISA Pentium

Reply 109 of 539, by Anonymous Coward

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Writing a7h to port 64h changes command byte from 45h to 65h.

But writing 65 directly to the command byte doesn't work. I wonder why...

edit: looks like my conditions are wrong.

"Will the highways on the internets become more few?" -Gee Dubya
V'Ger XT|Upgraded AT|Ultimate 386|Super VL/EISA 486|SMP VL/EISA Pentium

Reply 110 of 539, by NJRoadfan

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To write the configuration byte, you have to write 60h to 64h, wait for the buffer to clear, and than write the byte to 60h. You only need to alter the configuration byte to enable the mouse IRQ line. the A7h/A8h commands can handle enabling the mouse. If I'm reading the osdev article right, sending A8h (turn mouse on) after sending A7h (mouse off) should switch your config byte back to 45h if the keyboard controller properly supports the mouse and remain at 65h if it doesn't.

Its obvious that the only thing the "mouse" option does in the BIOS is change the configuration byte and alter the Int 11h equipment byte (which isn't even used by any OS outside of DOS). The i8042 family isn't exactly intelligent as half that initialization routine is sanity checks to ensure hardware is there.

Reply 111 of 539, by Anonymous Coward

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Just before I went to bed I was actually able to flip the mouse IRQ bit. (value 47)...but I didn't have the mouse plugged in. When I restarted to try again I couldn't get it working. I didn't want to plug the mouse in while the system was running incase I blew something out. After work today I can probably figure it out.

It appears that reading and writing is very timing sensitive. I was inserting some FOR loop timing delays around the time I got the write command working. Additionally, at least one of my logic comparisons was indeed wrong.

"Will the highways on the internets become more few?" -Gee Dubya
V'Ger XT|Upgraded AT|Ultimate 386|Super VL/EISA 486|SMP VL/EISA Pentium

Reply 112 of 539, by NJRoadfan

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Something weird is certainly happening. I can only get the config byte after pounding the controller with the command several times. Whats weird is it seems that my keyboard re-enables itself mid execution (I have the config byte printing multiple times during each step of the program). The only thing I can think of is an IRQ trigger from the keyboard forces the controller to re-enable the keyboard clock line. Seems silly.

About that 440BX machine.... It has the AMI WinBIOS from 1997. The BIOS string indicates that PS/2 mouse support is disabled, but the option is present and enabled in the BIOS. The config byte is "65" by default, so the BIOS on that machine doesn't enable the mouse clock line or IRQ at all (assuming I'm getting the correct output for the config byte)! WTF

CuteMouse had no problem finding it, after loading and unloading the driver, I get "45" back from the config byte.

Reply 113 of 539, by Anonymous Coward

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I tried loading cute mouse on my 486 EISA board after modifying the hardware byte at 0040:0010 and with the command byte set to 45. It didn't work. What is your 440BX machine doing that is so special?

The kbc is very sensitive to program timings. Perhaps by putting in all those print statements you're throwing something off.

"Will the highways on the internets become more few?" -Gee Dubya
V'Ger XT|Upgraded AT|Ultimate 386|Super VL/EISA 486|SMP VL/EISA Pentium

Reply 114 of 539, by NJRoadfan

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I have no clue what makes that board special other than the fact that it already has mouse support. Are you using the original AMI MEGAKEY keyboard controller, or the Holtek in your adapter?

Reply 115 of 539, by Anonymous Coward

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I guess mine is "Megakey", though it just says "Version F" on it. I already confirmed it working with mouse support on an SiS 496/497 motherboard. I tried the holtek too. No change.

"Will the highways on the internets become more few?" -Gee Dubya
V'Ger XT|Upgraded AT|Ultimate 386|Super VL/EISA 486|SMP VL/EISA Pentium

Reply 116 of 539, by Anonymous Coward

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Okay. I managed to set the command byte to 47h with the mouse installed, but the mouse is STILL not working.

I don't entirely understand HOW to program the bloody command byte because my program only works intermittently. I have had the best luck by first sending the A7h command to port 64h (disable mouse interface), enabling IRQ12 generation by setting the command byte to 67h, and then sending the A8h command to port 64h (enable mouse interface).

So it's great that I can set the command byte...but why the hell isn't the mouse working? It seems like the BIOS is sending some kind of command to initialise the mouse. I was reading some code that another person wrote, and it looked like the initialisation process started out similar to what we have been doing, but added host commands F6 (set defaults) and F4 (enable). Are these commands sent to port 64h too?

There's some relatively interesting stuff in this discussion thread:

http://f.osdev.org/viewtopic.php?f=1&t=19873

After I set the command byte to 47, I can send the 0xff command to reset the interface...but sending 0xF6 or 0xF4 to initialize the mouse locks up the machine.

"Will the highways on the internets become more few?" -Gee Dubya
V'Ger XT|Upgraded AT|Ultimate 386|Super VL/EISA 486|SMP VL/EISA Pentium

Reply 117 of 539, by NJRoadfan

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If you are using CuteMouse, don't forget the Int 11h equipment byte. Once that is set along with the i8042 config register reading 47h, it should work. If my assembly skills weren't non-existent, I could tell you what CuteMouse does to initialize the mouse. The osdev link shows we aren't alone though. All of those commands are sent to 64h, the only time one should be writing to 60h is when you want to alter the config register. I looked at the sample code listed, and it proves that the i8042 is dumber than a doornail if it needs that much code to work reliably. Makes me wonder how commercial operating systems manage to get it working without a problem.

All I know is, banging 64h about 4-5 times with the 60h command usually gets it to spit out the config register on 60h. This would be a lot easier if the chip had a dedicated register for reading/writing command values as opposed to sharing the I/O buffers with the keyboard/mouse.

Reply 118 of 539, by Anonymous Coward

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I already tried the int 11h equipment byte. No change. I tried both the Cutemouse and pc dos mouse drivers. Can you point me to the version of CTMOUSE you are using? I was pretty sure I downloaded the one that probes for hardware directly (it's an alpha version). Do you think the BIOS is perhaps not enabling IRQ12?

-edit-

I went back and had another peek at the CMOS RAM. It seems that the equipment byte on port 70h location 14h is not a clone of the one in BIOS memory area of regular DRAM. The mouse setting for AMIBIOS CMOS RAM is actually stored at port 70h location 11h bit 7. My EISA board actually does enable this bit by default. Normally I get back value BB. If use AMISetup or toggle the bit manually it changes to 3B. My EISA config program normally reports "mouse enabled", but when I toggle the bit to 3B it reports "mouse disabled".

It still doesn't help us much, but interesting none the less.

Another question. How come when PS/2 mouse support is enabled in BIOS total conventional memory is reduced to 639KB?

-edit-

Looks like the BIOS is doing something else. Try to read up on this:

0009FC00 - 0009FFFF 1 KB PS/2 mouse data area

http://www.rigacci.org/docs/biblio/online/fir … re/mem-conv.htm

http://stanislavs.org/helppc/int_15-c2.html

"Will the highways on the internets become more few?" -Gee Dubya
V'Ger XT|Upgraded AT|Ultimate 386|Super VL/EISA 486|SMP VL/EISA Pentium

Reply 119 of 539, by Anonymous Coward

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Here's some source code from a ROM BIOS that apparently enables the EDBA. I think we need to look into Int 15h C2h.

"Will the highways on the internets become more few?" -Gee Dubya
V'Ger XT|Upgraded AT|Ultimate 386|Super VL/EISA 486|SMP VL/EISA Pentium