Trace the pins from that header using a multimeter. They should be,
Vcc (5V)
GND
Mouse Data (Goes to pin 28 on the keyboard controller)
Mouse Clock (Goes to pin 39 on the keyboard controller)
There may or may not be some missing jumper headers which switch the routing of traces. This is because the keyboard controller is often wired differently (externally) for PS/2 mouse and non-PS/2 mouse operation. Check to see if Mouse Clock and Mouse DATA pass through an inductor before going to the keyboard controller. That inductor may be present, or may have empty solder pads.

I followed some threads on Russian forums (which I got Google-translated to Polish and I found some posts regarding PS/2 on 1425B. It seems that this feipoa is right and this header indeed serves as aPS/2 mouse connector:

"Mouse should be selected on the PS / 2 port (even the laser), while on the board must be a port (some 486 it is, for example, 1425B that I personally use).
The USB do not see much sense. With modern PCI cards the only question is whether they should be 3.3V, as the aT 486 does not have these three volts (although craftsmen soldered to the motherboard P1). And yet, in my opinion 486, your computer must also work with DOS (in addition to Windows). In the SIS chipset will only work FPM memory - your happiness, if you have 128MB of FPM. UMC chipset and is supported EDO"

There is also Vogons thread that confirms that there is a working PS/2 port on board: A-Trend ATC-1425B. Could this be the board everybody would love to own?

It seems like ATC-1425B has all the features most users here value, regardless of being poorly documented.

Some users hold the ability to install 1024K cache in high regard. This MB is limited to 512K, single-banked.

just out od curiosity:

this ATC mobo has some solder pads that look as there was an option to add some cache sockets. Wouldn;t that allow some cache expansion? (sorry, I'm not an expert here).

There are only two areas which look like solder pads for 2 DIPS, which I do not understand. If it was for cache expansion, there wouled be 4 DIP solder pads. Those two DIPS may have been for an alternate cache TAG configuration, not for increasing the cache quantity.