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Will a Cyrix Cx486 DX2 run at 1x?

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First post, by feipoa

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Does anyone know for certain if a Cyrix Cx486 DX2-50 or DX2-66 can be run with a 1x multiplier instead of 2x?

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Reply 1 of 27, by root42

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If I remember correctly, is the multiplier internal to the CPU. I don't hink it can be set from outside.

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Reply 4 of 27, by kixs

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I though all DX2 cpus have fixed 2X multi. Don't even know if there is a motherboard with jumpers for 1X/2X, only for 2X/3X.

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Reply 5 of 27, by Anonymous Coward

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What he's asking is if there is a register setting to set the internal multiplier to 1X. Cyrix 5x86 chips can do this.

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Reply 7 of 27, by Stiletto

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feipoa wrote:

Anyone have the datasheet for Cyrix Cx486DX or DX2?

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snippet: http://datasheet.datasheetarchive.com/origina … cans-006926.pdf

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Reply 8 of 27, by feipoa

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Wow, there's a 3.3 V version of an original Cx486DX? Also, did the Cx486DX really come with write-back cache? I feel this CPU is seriously under-explored by the forum.

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Reply 9 of 27, by Anonymous Coward

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The 3.3V version of the DX must be pretty rare. Maybe only used in laptops. I would guess that a Cyrix 486 with writeback should be able equal to an intel/AMD 486 with just write through.

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Reply 10 of 27, by feipoa

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wait... did all Cyrix 486DX/DX2/DX4 chips come with write-back cache? Doesn't seem like anyone wants to run these.

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Reply 11 of 27, by Anonymous Coward

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That's an interesting. Question. I suspect that the answer is likely 'yes'. We'll have to get a hold of the databook to know for certain though.

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Reply 12 of 27, by Tiido

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I have a 3.something V Cyrix DX2 but no 3.xV capable motherboard to test things.

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Reply 13 of 27, by Eep386

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Cyrix's cache mechanism is mysterious to me. I know Cyrix trumped its 2K write-back cache on the Cx486S, not sure if they retained that mechanism (but simply quadrupled the cache size) on the Cx486DX or not.
Despite that, I've measured the Cx486 L1 caches to be among the slowest of the 486's in terms of read/write latency, but they make up for it with a measurably lower off-cache access latency (on the order of 12~24% lower depending on the board) than any other 486 I've tried. This would present a unique problem, however, as stuff that's tightly optimized to fit in a vanilla 486's 8K cache would predictably not reap as much benefit from running on a Cyrix chip as on an Intel or AMD, while 'dirty' x86 code that is more or less cache insensitive (or far too big to fit into even 16K of cache) could potentially run measurably faster on a Cyrix depending on the intensity of memory I/O they perform. It's like Cyrix optimized their chip to favor mixed, more or less unoptimized x86 code over 486-specific code.

Last edited by Eep386 on 2018-05-22, 20:07. Edited 2 times in total.

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Reply 14 of 27, by BeginnerGuy

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http://www.fermimn.gov.it/inform/materiali/ev … .dir/486-tb.htm

According to the above link all Cx486 chips have 8KB write-back. I'd love to have that data book but $30 after shipping is a bit pricey for it.. Intel 486DX data book is archived online as a free pdf download 😒 .

I don't have any Cyrix DX2 or DX4 to test it out, but I'm sure it's accurate.

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Reply 15 of 27, by Eep386

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Well, according to that brief, the write-back cache mechanism claims to reduce bus bottlenecks by up to 15%, which is consistent with the nominal 12% reduction in off-cache access latency I've measured under CacheChk and Speedsys. But the L1 cache is still pretty slow. On my Cx486DX2-66 system, the L1 cache is only slightly (about 2-3 cycles) faster than the motherboard L2 cache.

That said, I really enjoy my Cyrix Cx486DX2. I always enjoy using off-beat stuff. Intel never released a DX2-80 to my knowledge, while Cyrix did. At 80 MHz the Cyrix is more than a match for any DX2-66 and can run DX4-100s fairly close.

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Reply 16 of 27, by feipoa

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When looking at my U4BC data, I also notice that there isn't much difference between the L1 and L2 read transfer rates, e.g., 55 MB/s and 51 MB/s, respectively for a Cx486DX2-66. On the same system, an Intel DX2-66 with WT cache indicates 69 MB/s and 47 MB/s for L1 and L2 cache read speeds.

Is it a fair assumption that the cache structure on the Cx486DX2 is the same as that on the Cx486DX?

For the predicesor, the Dx486 FasCache (2KB, no FPU), wiki mentions something about it having a sort of boost, giving it an edge over write-through cache. Is this 'boost' the same as write-back cache? It would be interesting to benchmark the Cx486 FasCache against the TI486SXL (8kb WT, no FPU) and Cx486DX. I had hoped that the original Cx486DX had write-through cache, but it may have write-back afterall.

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Reply 17 of 27, by Eep386

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It should be very similar. You'll notice too that the L2 cache accesses are slightly faster (~10%) than usual on a Cyrix.
There's a FUD-y rumor floating about that the L1 cache on a Cx486DX2 runs at only the FSB clock, but I don't know how much truth there is to that urban legend. I believe the disparity in L1 speed is more likely due to the peculiar manner in which Cyrix implemented their write-back cache mechanism and memory interface, where it seems much more focused on off-L1 access performance than it is on raw L1 efficiency/bandwidth.

The 'boost' for the FasCache chips is IIRC some special write burst signal option that is also supported by the 'full' Cyrix Cx486DX/DX2. My MV035F board fully supports all the special features of the Cx486DX/DX2, so I presume it has the write burst signal active.

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Reply 18 of 27, by gerwin

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For the cx486, I figure the IBM datasheets also apply:
http://datasheets.chipdb.org/IBM/x86/486/
40012.pdf mentions that the IBM 486DX2 and DX4 are not clock multiplier adjustable.

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Reply 19 of 27, by feipoa

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Eep386: Are you suggesting that the Cx486 FasCache uses write-through cache?

Interesting, that IBM datasheet mentions that IBM 486SX2, IBM 486SX3 have adjustable multipliers, but not the DX series. I'd be surprised if the Cyrix Cx486DX4-100 is not 2x/3x adjustable.

I have purchased one Cx486DX-40 and one Cx486 FasCache, so hopefully one day I'll look into this a bit more.

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