What's that gonna give ? A "PIVEM" motherboard ? 🤣
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wrote:Well it have been implemented on 16-bit platforms : I've seen a Ti486SXLC2 motherboard with a VLB connector once here, so that have been made
did you misremember 486DLC or 486SXL2 by any chance? http://www.imagebam.com/image/05f7d0739697803
PGA132 = 32bit
No that was a soldered one and that was a SXLC2 iirc
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that would be truly something, can you find a photo/model?
VLB has LBS16# pin, but its for devices to tell motherboard they are 16 bit, not the other way around
The mobo to the left is IBM Opal with an IBM 486SLC2. They used two PAL16L8 and one PAL16R4 logic chip to glue 32-bit VLB and 16-bit system bus. The performance is quite decent for what it is and there are no issues AFAIR.
wrote:Well it have been implemented on 16-bit platforms : I've seen a Ti486SXLC2 motherboard with a VLB connector once here, so that have been made.
Really? Can you find a link? I've seen one of those two, but only what was left of it after it was salvaged (stuff sliced off).
The IBM SLC2 boards with VLB are fairly common on here though.
"Will the highways on the internets become more few?" -Gee Dubya
V'Ger XT|Upgraded AT|Ultimate 386|Super VL/EISA 486|SMP VL/EISA Pentium
That might have been the IBM ones, all I remember is that it was on vogons few months ago.
The point is that vlb on 16bit platform has been done.
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VLB may have 32 data bits but data transfers to the device can happen in 8, 16 and 32 bit quantities and if you don't allow bus mastering devices then there's no sort of problems only 8 and/or 16bit writes to the device. Bus mastering device on a 16bit host would cause issues but 16bit host driving a slave device only will have no complications.
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wrote:VLB may have 32 data bits but data transfers to the device can happen in 8, 16 and 32 bit quantities and if you don't allow bus mastering devices then there's no sort of problems only 8 and/or 16bit writes to the device. Bus mastering device on a 16bit host would cause issues but 16bit host driving a slave device only will have no complications.
there are no A0-A1 address lines on the VLbus, one way or another you will have to construct some form of buffer to hold 32bits of data during transfers, juggling that cant be fast, makes whole enterprise dubious at best
It is still only matter of one CPLD or less than 10 logic chips to connect slave only VLB to 16bit bus. 2x 8bit buffers to fill top 16bits of address bus, less than 5 chips to produce the byte select signals.
T-04YBSC, a new YMF71x based sound card & Official VOGONS thread about it
Newly made 4MB 60ns 30pin SIMMs ~
mida sa loed ? nagunii aru ei saa 😜
