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Reply 300 of 304, by feipoa

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Oh no. Is there any instruction you can send to the CPU that only an IBM 486BL3 will return a unique response?

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Reply 302 of 304, by Mumak

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It's a shame IBM did implement MSRs (which are standard P5 instructions), but didn't care to spend a few more transistors on CPUID as well.
In DOS it's no problem to re-route the interrupts and catch the fault (i.e. GPF, or as The Uncodumented PC says a Double-Found that can occur as well), but I don't have an idea how one could do this in 9x Kernel/VxD.
I just looked at NuMega VtoolsD and one file caught my attention - vfault.h. What do you think Franck?

The class library provides classes that facilitate hooking faults.

Reply 303 of 304, by repaxan

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There's a CPU-Z bug with listing the DIMM's supported frequency, this (slightly aggressive) video can explain it better than I can:

https://www.youtube.com/watch?v=SHLiZJZuDao

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Reply 304 of 304, by red-ray

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repaxan wrote on Yesterday, 04:13:

There's a CPU-Z bug with listing the DIMM's supported frequency, this (slightly aggressive) video can explain it better than I can:

I feel the video is misleading and suggest looking at what I posted about SPD speed reporting.