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Reply 440 of 472, by red-ray

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mastergamma12 wrote on 2020-04-16, 18:40:

Also I ran SIV32L under Mini XP, it reports everything as expected except for a few things that it'd show if it was an actual xp installation.

Thank you for confirming the changes worked as I hoped for 98 and testing on XP. I was pleased to see SIV detected and reported the ASUS AS99127, but it failed to read the RIMM SPD. I noted the 3dfx Voodoo5 5500 GPU was not reported, this is expected and should be the only difference from a real XP installation.

How many 3-pin fans does the system have and which fan headers are they connected to please? SIV only reported one and thinks it connected to the CHA FAN header.

I did some research and it seems the P3C-E has an SMBus multiplexor so I added support in the attached SIV32L 5.48 P3C-01, may I have new Mini XP save files so I can check if the SPD is now reported?

Last edited by red-ray on 2020-04-16, 22:34. Edited 1 time in total.

Reply 441 of 472, by mastergamma12

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SPD Detection still doesn't work.

There's 3 fan headers, CHA is actually CPU on the board, found that out by putting my finger on the top of the fan to slow it's RPM and that was reflected by SIV, there's also a front fan plugged into CHA which is spinning but isn't reported.

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Reply 442 of 472, by red-ray

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mastergamma12 wrote on 2020-04-16, 20:54:

There's 3 fan headers, CHA is actually CPU on the board, found that out by putting my finger on the top of the fan to slow it's RPM and that was reflected by SIV, there's also a front fan plugged into CHA which is spinning but isn't reported.

Thank you, I have interposed CHA_FAN and CPU_FAN, but I can't see why the chassis fan is not reported, maybe it's an issue with the fan. Can you try a different 3-pin fan and/or also try using the PWR_FAN header. Which fans does the BIOS report?

I think I spotted and fixed the issue with reading the SPD, please try the attached SIV32L 5.48 Fans-01 and post a new save file. If you look at Menu->System->SMB Bus there should now be two SMBuses.

Last edited by red-ray on 2020-04-17, 10:36. Edited 1 time in total.

Reply 443 of 472, by mastergamma12

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SPD Info's now detected properly, sees both blue samsung rdram sticks.

Also turns out that my front fan has a bad sensor pin on it as a Cooler Master 120mm fan's detected properly however siv's confused with CHA and PWR.

Other than that, looks good.

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Reply 444 of 472, by red-ray

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mastergamma12 wrote on 2020-04-17, 04:01:

Also turns out that my front fan has a bad sensor pin on it as a Cooler Master 120mm fan's detected properly however siv's confused with CHA and PWR.

Thank you and for Beta-01 I will swap CHA_FAN and PWR_FAN.

I was reading the ASUS P3C-E manual and noticed the ASUS DR2 DIMM riser on page 25 which allows SDRAM rather than RDRAM to be used. Do you know if these really exist as the Intel 82820 datasheet gives the impression SDRAM is not supported.

Reply 445 of 472, by mastergamma12

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red-ray wrote on 2020-04-17, 06:55:
mastergamma12 wrote on 2020-04-17, 04:01:

Also turns out that my front fan has a bad sensor pin on it as a Cooler Master 120mm fan's detected properly however siv's confused with CHA and PWR.

Thank you and for Beta-01 I will swap CHA_FAN and PWR_FAN.

I was reading the ASUS P3C-E manual and noticed the ASUS DR2 DIMM riser on page 25 which allows SDRAM rather than RDRAM to be used. Do you know if these really exist as the Intel 82820 datasheet gives the impression SDRAM is not supported.

AFAIK those risers with the MTH chip exist but I've never seen one.

Course the MTH is know to be buggy as all hell so no real point in using one.

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Reply 446 of 472, by red-ray

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mastergamma12 wrote on 2020-04-17, 06:59:

Course the MTH is know to be buggy as all hell so no real point in using one.

I recalled similar and my only real interest in them is in seeing what SIV reports when one is installed.

I have now released SIV 5.48 Beta-01 which should tidy up the fan names, are they now correct please?

Reply 447 of 472, by repaxan

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@red-ray since I can't reply to the PM

SIV also doesn't show the right memory frequency, but unlike hwinfo it shows 480/960.

I forgot to mention it in the other thread - but these are super sketchy chinese DIMMs and the SPD profiles on them are a little 'weird'.

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Reply 448 of 472, by red-ray

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repaxan wrote on 2020-05-13, 04:07:

@red-ray since I can't reply to the PM

SIV also doesn't show the right memory frequency, but unlike hwinfo it shows 480/960.

I forgot to mention it in the other thread - but these are super sketchy chinese DIMMs and the SPD profiles on them are a little 'weird'.

Than you for checking out SIV and posting the results. I think you need to make about 20 posts before you can send PMs, but it may be more.

You used SIV V5.47 and had you used the SIV 5.48 Beta-08 attached to the first post then I suspect SIV would have reported a 800 MHz data rate. That said I spotted the SIO reporting could be improved so have done this. Please may I have new save files generated using the attached SIV32X V5.48 Beta-09? How do the values on the [Status] panel now compare with what HWiNFO32 reports?

The DIMM SPD looks OK to me, but the Manufacturer's JEDEC ID Code of 7F98000000000000 means that they should be Kingston so I guess they are Chinese copies.

Last edited by red-ray on 2020-05-14, 05:17. Edited 1 time in total.

Reply 449 of 472, by repaxan

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Yup it's now reporting it correctly - nice.

In your OP it had 64X and 32L only, not 32X which is what I understood I'm supposed to be using in 32 bit XP.

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Reply 450 of 472, by red-ray

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repaxan wrote on 2020-05-14, 04:20:

In your OP it had 64X and 32L only, not 32X which is what I understood I'm supposed to be using in 32 bit XP.

Thank you for checking out Beta-09 and posting the results which as you said has fixed the memory speed. The cause of the issue was the hardware reporting a value of 6 which is not listed in the P45 chipset datasheet!

When testing it does not really matter which you use as SIV32L and SIV32X should be functionally identical, but SIV32L is an ASCII build and will run on Windows 9X/NT4 or later whereas SIV32X is a Unicode build and needs Windows XP or later. As SIV32X is Unicode it will be a tad faster as ASCII WIN32 calls get converted to Unicode WIN32 calls within the Windows DLLs such as KERNEL32.dll, further SIV32X works better for none ASCII locales such as Chinese + Japanese + Korean, compare the SIV32L Menu->Help->SIV Languages with the SIV32X one.

Reply 451 of 472, by repaxan

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Another 775 bug, this time it's the 5v and Vdimm readings on a EVGA 790i Ultra SLI motherboard. (5V and Vdimm)

Real voltages of the PSU are around 11.9v, 5.15v, 3.42v.

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Reply 452 of 472, by red-ray

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repaxan wrote on 2020-05-21, 04:51:

Another 775 bug, this time it's the 5v and Vdimm readings on a EVGA 790i Ultra SLI motherboard. (5V and Vdimm)

Real voltages of the PSU are around 11.9v, 5.15v, 3.42v.

Thank you for the report and another interesting system, I wonder what other systems you have... I will fix VIN0 DIMM for V5.49 Beta-02. Currently I don't think +5V is reported by the SIO at all so plan to remove it. Neither Martin or I know how to read the CPU Current or nForce Fan Speed so plan ask around and see if we can find out.

VBAT being 2.736 seems rather low to me, can you check what it really is? Maybe it's time for a new CR2032...

Update: I think I have found out how to read the nForce Fan Speed, please will you see if SIV64X V5.49 Beta-02 reports for it. It should also fix VIN0 DIMM, do all the reported voltages now look correct? Are they the same as the fixed HWiNFO?

Reply 453 of 472, by repaxan

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It's funny because I didn't even realize the chipset fan speed was missing.

Here you go - memory voltage is reading properly now, but the chipset fan is still 0.
The new hwinfo beta build isn't up yet, so can't cross check.

And indeed the clock battery in it is 2.77v.
Maybe this board just drains it unusually fast? I'm pretty sure I had to put in a fresh one when I got it (only a couple years ago).

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Reply 454 of 472, by red-ray

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repaxan wrote on 2020-05-22, 03:32:

It's funny because I didn't even realize the chipset fan speed was missing.

Thank you, but I can't see why the Chipset/nForce fan did not get reported. Using the attached SIV64X V5.49 Dump-03 test SIV please do SIV64X -DBGMCH -EXIT=20 > SIV_DBGOUT.log | MORE and post the log file.

This should trace add the raw values that are used to calculate the nForce fan speed. I also added Menu->Hardware->H/W Detail->I/O nForce which dumps the nForce chipset sensor I/O ports and updates every couple of seconds. Offset 34 should be the tachometer count and it will be interesting to see if it's value changes so post a couple of screen shots or a new save file.

I have not fully tested the [I/O nForce] panel as I don't have an appropriate system so screen shots from any system with an nForce chipset would be handy.

Last edited by red-ray on 2020-05-22, 21:53. Edited 1 time in total.

Reply 455 of 472, by repaxan

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Offset 34 oscillates wildly and looks exactly the same as if it was just a random number.
But when I unplugged the fan with that screen open, it 'stuck' at whatever value was last there and stopped changing until I plugged fan back in.
Is it supposed to be a counter or something?

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Reply 456 of 472, by red-ray

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repaxan wrote on 2020-05-22, 21:29:

Is it supposed to be a counter or something?

Thank you for the test and 34 is basically a pulse counter, I think it increments by 4 each time the fan rotates once so SIV reads it, waits about 50ms, reads it again and does some sums.

By looking at the log file I think I have spotted and fixed the issue, it looks like I did a Copy/Paste and failed to change IOCTL_SIV_INWORD to IOCTL_SIV_INBYTE.

Please try the attached SIV64X 5.49 Byte-03 test SIV and generate a new log file. If 6 nForce is reported does the speed look correct ?

I also spotted there was a bug in IOCTL_SIV_INWORD which has gone unnoticed since I added it on 12-Jul-2007! This should also be fixed and [I/O nForce] should now correctly display the words, does it?

Last edited by red-ray on 2020-05-23, 06:03. Edited 1 time in total.

Reply 457 of 472, by repaxan

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The nforce fan entry shows weird values, I attached one with the stock fan (~5300 RPM) and one with a 140mm fan (~1000 RPM) hooked up to the nforce fan header.

Words are showing properly in the IO Nforce window.

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Reply 458 of 472, by red-ray

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repaxan wrote on 2020-05-22, 23:53:

The nforce fan entry shows weird values

Thank you for the new test, but to be 100% sure what is happening I need to see a log file generated by doing SIV64X -DBGMCH -EXIT=60 > SIV_DBGOUT.log | MORE . My guess is the issue is the byte value at 34 wrapping and the compiler doing a long operation when I thought it would do a byte operation so I have adjusted to code, does the attached SIV64X V5.49 Wrap-03 do any better?

Please will you check the other fans get reported when you connect your 140mm fan and their names reflect the motherboard header names?

Looking at [I/O nForce] which other values change? The word at offset 04 is the MCP temperature so should, to get °C do ( ( raw & 0x3FFF ) - 5369 ) / 23.05. I am wondering if one of them may be the CPU current.

Do you happen to know what tRFC is? If I know the value I may be able to deduce where to read it from.

Last edited by red-ray on 2020-05-23, 21:51. Edited 1 time in total.

Reply 459 of 472, by repaxan

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Okay so the board has these fan headers in total: CPU fan, nForce fan, sys fan, VReg fan, aux fan, chassis fan, chassis fan 2.
CPU and nForce are occupied, so I'm moving the 140mm fan between the others.
Aux, chassis, chassis 2 are reported correctly in SIV.
Sys and vreg seem unmonitored (no entry in BIOS) but I attached logs of them anyway.

I kept the IO Nforce window open and started/stopped prime95, and the only values I saw changing were 04 and 34.

tRFC reported in the BIOS (auto timings) is 59, which is what it should be, based on the SPD.

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