VOGONS


First post, by furan

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Alright, here's the dealio - I have an Amiga 386SX BridgeBoard - that's the best you can easily get for an Amiga for PC emulation. There are various ways to upgrade it - you can change the clock crystal, you can swap out different 5v compatible chips (like the TI 486 PQFP100 guys), or you can use a snap on interposer to get something maybe better, like a 3.6v IBM 486BL2.

I've been looking at things and I think with a little glue logic, I can get an 83mhz pentium overdrive (which has the BS16/BS32 signals) to live on a 16 bit CPU bus/24 bit memory bus.

Has anyone tried anything like this? The overdrive specifically has 16kb of cache to get over the hump of slower (and narrower) memory accesses, so I think it might be a good fit, and might be the best that can be done on a 386SX board. I guess one could also try to do this with an am5x86-133/75.

Keep in mind - there's no possibility of using a different board here, I'm stuck with the 386sx/25 A2386SX bridgeboard, so the idea of "just use different hardware" is out of the question.
Thanks!

Last edited by furan on 2020-01-18, 21:14. Edited 1 time in total.

Reply 1 of 42, by H3nrik V!

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Sounds risky for a relatively rare(?) board. But would be crazily awesome if possible ..

Please use the "quote" option if asking questions to what I write - it will really up the chances of me noticing 😀

Reply 3 of 42, by derSammler

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I doubt this is possible. The 386sx sits on a 16-bit bus. Some "glue logic" won't let you connect a CPU with a 32-bit bus. If that would be possible, upgrade chips like the 486SLC and 486DLC would not have existed. Instead, we would have seen adapters to use a real 486 CPU in a 386 mainboard. But that just doesn't work.

Reply 4 of 42, by candle_86

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derSammler wrote on 2020-01-17, 22:54:

I doubt this is possible. The 386sx sits on a 16-bit bus. Some "glue logic" won't let you connect a CPU with a 32-bit bus. If that would be possible, upgrade chips like the 486SLC and 486DLC would not have existed. Instead, we would have seen adapters to use a real 486 CPU in a 386 mainboard. But that just doesn't work.

Maybe it was to expensive though glue logic won't work, you'd need a microcontroller doing bus translation on the fly, it would still be expensive though.

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Reply 6 of 42, by Anonymous Coward

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With glue logic POD83 might be possible, but what I really want to know is how you intend to mount it. It's a little too heavy for a clip-on upgrade.

"Will the highways on the internets become more few?" -Gee Dubya
V'Ger XT|Upgraded AT|Ultimate 386|Super VL/EISA 486|SMP VL/EISA Pentium

Reply 7 of 42, by furan

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derSammler wrote on 2020-01-17, 22:54:

I doubt this is possible. The 386sx sits on a 16-bit bus. Some "glue logic" won't let you connect a CPU with a 32-bit bus. If that would be possible, upgrade chips like the 486SLC and 486DLC would not have existed. Instead, we would have seen adapters to use a real 486 CPU in a 386 mainboard. But that just doesn't work.

I don't think you understand the BS16 signal of a 486.
See:
https://hackaday.io/project/8348-random-ridic … -8-bit-memories
http://www.s100computers.com/My%20System%20Pa … CPU%20Board.htm

Also from the Horse's Mouth:
Section 7.1.3 Dynamic Data Bus Sizing, page 91:
http://bitsavers.trailing-edge.com/components … essor_Nov89.pdf

If you read the Pentium Overdrive docs, they implement all of these signals and work the same.

Last edited by furan on 2020-01-18, 04:08. Edited 1 time in total.

Reply 8 of 42, by furan

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Anonymous Coward wrote on 2020-01-18, 02:34:

With glue logic POD83 might be possible, but what I really want to know is how you intend to mount it. It's a little too heavy for a clip-on upgrade.

I was thinking about using a clipon, but also supporting it by having the upgrade pcb have plastic clips to the side of the bridgeboard. Tricky.

Reply 9 of 42, by furan

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rmay635703 wrote on 2020-01-18, 01:01:

IBM Blue Lightning 486slc3 is really the only viable option here.

Still would need an adapter and a rare Japanese upgrade to get one.

Hoping I can prove you wrong 😀

PS - I am traveling but may take a photo of all my rare Japanese upgrades when I get home I guess.

Last edited by furan on 2020-01-18, 04:17. Edited 1 time in total.

Reply 10 of 42, by xjas

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No idea if this is possible, but I'd love to see it happen if it is. Unless you have an 060 in there, the x86 side would be like two orders of magnitude more powerful than the host system.

You might even be able to run Fellow or an early version of UAE on the bridgeboard. 😜

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Reply 11 of 42, by furan

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xjas wrote on 2020-01-18, 04:13:

No idea if this is possible, but I'd love to see it happen if it is. Unless you have an 060 in there, the x86 side would be like two orders of magnitude more powerful than the host system.

You might even be able to run Fellow or an early version of UAE on the bridgeboard. 😜

I've got most of the Amigas (including 3000T/4000T) - in this case it'd go in a 4000T with a Phase5 CyberStorm PPC/68060.

Reply 12 of 42, by furan

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Here's a pic of my last "upgrade" - a Kingston SX20LCM board with the processor removed and a 3.6v IBM SLC2 in its place (5V I/O tolerant). Deadbugged a regulator and a new clock. That makes for 16kb of L1 and 64kb of L2! It booted, but I didn't have the ability to get software on the A2286AT I built it for, so I didn't enable the caches to get numbers. Really regretting it. If you look closely you can see I had to put new headers on the A2286AT board in order to make the 286->486 upgrade snap to the main board in between the two.

oP4ihji.png
1CmOV0q.png

Reply 13 of 42, by dionb

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xjas wrote on 2020-01-18, 04:13:

No idea if this is possible, but I'd love to see it happen if it is. Unless you have an 060 in there, the x86 side would be like two orders of magnitude more powerful than the host system.

You might even be able to run Fellow or an early version of UAE on the bridgeboard. 😜

The obvious - pointless but fun - thing to do with a PODP: run Windows XP on it :+

Admittedly RAM might be an issue if still stuck with 16MB max...

Reply 14 of 42, by Anonymous Coward

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furan wrote on 2020-01-18, 04:23:
Here's a pic of my last "upgrade" - a Kingston SX20LCM board with the processor removed and a 3.6v IBM SLC2 in its place (5V I/O […]
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Here's a pic of my last "upgrade" - a Kingston SX20LCM board with the processor removed and a 3.6v IBM SLC2 in its place (5V I/O tolerant). Deadbugged a regulator and a new clock. That makes for 16kb of L1 and 64kb of L2! It booted, but I didn't have the ability to get software on the A2286AT I built it for, so I didn't enable the caches to get numbers. Really regretting it. If you look closely you can see I had to put new headers on the A2286AT board in order to make the 286->486 upgrade snap to the main board in between the two.

oP4ihji.png
1CmOV0q.png

This is interesting. So you swapped out a 386SX-20 for an IBM 486SLC2? I was always told that SLC2 is bus compatible, but not pin compatible with the 386SX. I guess this proves everyone wrong. Still, cache coherency is going to be a big mess.

"Will the highways on the internets become more few?" -Gee Dubya
V'Ger XT|Upgraded AT|Ultimate 386|Super VL/EISA 486|SMP VL/EISA Pentium

Reply 15 of 42, by dionb

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Anonymous Coward wrote on 2020-01-18, 12:40:

[...]

This is interesting. So you swapped out a 386SX-20 for an IBM 486SLC2? I was always told that SLC2 is bus compatible, but not pin compatible with the 386SX. I guess this proves everyone wrong. Still, cache coherency is going to be a big mess.

Given how many pins have been raised up and rearranged, I'd hardly call this pin compatible - in fact 'big mess' seems pretty appropriate for this whole thing. But somehow it works, so massive kudos for that 😀

Reply 16 of 42, by furan

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dionb wrote on 2020-01-18, 13:49:
Anonymous Coward wrote on 2020-01-18, 12:40:

[...]

This is interesting. So you swapped out a 386SX-20 for an IBM 486SLC2? I was always told that SLC2 is bus compatible, but not pin compatible with the 386SX. I guess this proves everyone wrong. Still, cache coherency is going to be a big mess.

Given how many pins have been raised up and rearranged, I'd hardly call this pin compatible - in fact 'big mess' seems pretty appropriate for this whole thing. But somehow it works, so massive kudos for that 😀

Thanks. No pins were rearranged, those are simply all of the 3.6v power supply pins that would normally be 5v for a 386.

Reply 17 of 42, by furan

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Anonymous Coward wrote on 2020-01-18, 12:40:

This is interesting. So you swapped out a 386SX-20 for an IBM 486SLC2? I was always told that SLC2 is bus compatible, but not pin compatible with the 386SX. I guess this proves everyone wrong.

It's pin compatible, /but/ the 5v VCC pins need to be 3.6v. Folks in Japan/Europe have been doing these sort of hacks for a long time so I'm not sure where everyone comes from?

Here's an overlay of the 386sx/cx486slc/IBM 486slc2:
oa7ImsC.png

Anonymous Coward wrote on 2020-01-18, 12:40:

Still, cache coherency is going to be a big mess.

I don't mean to be rude, but
P4lErgl.png
Stacking caches doesn't create cache coherency issues because the LCM cache and the IBM cache both flush.
Recommended reading: The Cache Memory Book by Jim Handy

Reply 18 of 42, by Anonymous Coward

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How about a more interesting read? Specifically, the databook for the IBM SLC/DLC chips. Last time I checked it was MIA, so if you have it please share.

Also, if you could please point us to (links) the folks in Japan and Europe who have been doing these hacks forever that would be nice too. Not interested in TI/Cyrix stuff.

"Will the highways on the internets become more few?" -Gee Dubya
V'Ger XT|Upgraded AT|Ultimate 386|Super VL/EISA 486|SMP VL/EISA Pentium

Reply 19 of 42, by furan

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Anonymous Coward wrote on 2020-01-18, 19:44:

How about a more interesting read? Specifically, the databook for the IBM SLC/DLC chips. Last time I checked it was MIA, so if you have it please share.

I have been reading up on some of your other projects (google searched a few things and some of your threads came up) - pretty neat!

I've been searching for the IBM docs forever. The only ones I can find are slightly newer, and mostly about the more modern IBM 486 chips. But, the cache document and the voltage document talk about the SLC chips.
http://datasheets.chipdb.org/IBM/x86/486/

Voltage (confirms 5v I/O tolerant, but 3.6v drive):
http://datasheets.chipdb.org/IBM/x86/486/40011.PDF
Cache architecture:
http://datasheets.chipdb.org/IBM/x86/486/40010.PDF

I've also been hunting for “IBM Corporation, 486SLC Microprocessor Data Sheet, IBM Corporation, Essex Junction, VT, 1993” which doesn't seem to exist on the Internet in any form but patent/datasheet references.

I have a BridgeBoard thread on AmiBay going here:
http://www.amibay.com/showthread.php?102965-A … PC-Bridgeboards

Undoubtedly you will have seen everything I reference below:
http://redhill.net.au/c/c-4.html#slc2
https://web.archive.org/web/20030708095607/ht … rand=IBM+Option

The second doc confirms the pin compatibility (IBM words):
"Question:
What is an IBM 486SLC2 processor?
Answer:
It is an IBM-developed derivative of the Intel 386SX chip, called the 486SLC2. The 486SLC2 processor includes the instruction set of the 486SX, rather than the 386. It only uses the same socket pin configuration as the 386SX."

I know I said Japan/European folks have been swapping for ages but it turns out that's the TI chips (ugh) - that's where I started before I found the IBM ones. I reverse engineered from a few sacrificial IBM boards (ruined by batteries) to make sure the pinout matched - from what I could tell as you can see in that image there, where the IBM SLC chips differ is that they use some of the signal lines that are "NC/not connected" on the 386sx. So it's (as far as I can tell) okay to ground those.

Apologies for saying that folks have been doing this forever, I forgot that this was a thing I spent a lot of time on on my own (long story, but I have some amnesia).