As you can see in the second picture there are 4 rows each side and first one there are 3 rows on each side so they are not the same pin. It is D20 in both pictures. I think that pin is in use. D0-D31 are the data pins.

It's D20 and the pin is required, as it's a signal of the data bus.

It's not PLUG, as the 2nd link shows socket 2 with the outer row of pins only used by the Pentium Overdrive.

ops, I didn't notice it was socket 2...
That's sad, what can I do now?
Here is a picture of the cpu: https://imgur.com/a/PjsB8lF

It miiiight be possible to solder the pin back to the stubs I see in the hole and then covering things in epoxy to get mechanical strength necessary. That pin is essential to operation and it won't be possible to run the CPU without it.

Try to get a fitting PGA socket to put the CPU into. This way, you can solder a wire from the pad of the broken pin to the pin of the socket and avoid any stress on that repaired connection.

Just out of curiosity. Since the CPU starts real mode would it at least attempt to boot somehow?

Or would it just hang due to using 32bit bursts during the first cache line fill?

Tomorrow I will give a try and report back...
Tido, just in case, you will be my man 😁

Thank you everyone

mpe wrote on 2020-02-27, 17:33:

Just out of curiosity. Since the CPU starts real mode would it at least attempt to boot somehow?

During POST, switching to protected mode is already tested, so it will most likely not even show anything on screen at all.

Every time cache miss occurs CPU will initiate cache line fill. On 486 cache it's 16 bytes - 4 bytes per 4 transactions. So all data lines are required to perform cache fill.

mpe wrote on 2020-02-27, 17:33:

Just out of curiosity. Since the CPU starts real mode would it at least attempt to boot somehow?

Or would it just hang due to using 32bit bursts during the first cache line fill?

It will attempt to boot but will read corrupted data on the very first code fetch. The 486 expects data read from address with lowest 2 bits at 10b (=2) to be presented on data lines D16-D23. No matter what bus size mode it is (32-bit, or 16/8 with BS16#/BS8# asserted) - the mobo chipset has to route the data to correct D lines. If the 486 was actually doing this data routing internally and thus would always expect the 8-bit reads (which is how most 486 mobos implement the BIOS ROM) to be presented at D0-D7, you'd get at least past CPU test and into low 64k memory test in BIOS. So a POST card would work and display someting else than 00 before the system hangs. But, as it is, it won't work at all.

Actually both cache and prefetcher use all 32 data lines. So with one data line missing it should not work.

Similar. My DX2-50 is missing a VCC pin (whatever that means) it's unlabeled, but it's a red pin, R14. Will mine work?

Great was tempted to clip the pin on my CPU just for the sake of science.

Nitroraptor53 wrote on 2020-02-27, 19:50:

Similar. My DX2-50 is missing a VCC pin (whatever that means) it's unlabeled, but it's a red pin, R14. Will mine work?

VCC is +5V power supply that is repeated on the chip couple of times to improve current delivery. So there is a chance it would work without one.

mpe wrote on 2020-02-27, 20:33:

Great was tempted to clip the pin on my CPU just for the sake of science.

Nitroraptor53 wrote on 2020-02-27, 19:50:

Similar. My DX2-50 is missing a VCC pin (whatever that means) it's unlabeled, but it's a red pin, R14. Will mine work?

VCC is +5V power supply that is repeated on the chip couple of times to improve current delivery. So there is a chance it would work without one.

Got it.

Got a 5x86 that is missing the same D20 pin and a 486 that has no W/R# pin. I don't expect them to work this way, but I'm thinking of using them for an experiment. Do you think it would be possible to remove the die cap (seems to be soldered) and maybe attach a very thin wire to the leadframe (after identifying the correct pad)?

How does this type of damage occur? Is it from trying to pry them out of non-ZIF sockets?

quicknick wrote on 2020-02-27, 22:33:

Got a 5x86 that is missing the same D20 pin and a 486 that has no W/R# pin. I don't expect them to work this way, but I'm thinking of using them for an experiment. Do you think it would be possible to remove the die cap (seems to be soldered) and maybe attach a very thin wire to the leadframe (after identifying the correct pad)?

There isn't a leadframe, the chip is mounted like this: https://en.wikipedia.org/wiki/File:80486dx2-large.jpg
Is it possible to attach/solder something to these pads? I guess so, but you'd better have hands more steady than a surgeon and a better eyesight as well 😀 Also, once "decapped", any dust particles would rather quickly kill the chip.

Well I tried the cpu as predicted I got black screen.

How does this type of damage occur? Is it from trying to pry them out of non-ZIF sockets?

Most likely dropped from high place and landed on a corner.