The original 12/12/91 AMI BIOS:

A compatible MR BIOS that I found (yes, it works quite well too!):

Where did you find the MR BIOS image? Was it from here: How about a MR-BIOS ROM file repository?
?

Yes, it was from somewhere in that topic. I believe the file was V045B400, in MRBIOS_6.zip.

MRBIOS_1.zip contains lists for various chipsets, and I just went to the one labeled CONTAQ.DOC in that zip file. From there I walked through the numbered zip files until I found the one I was looking for. Unfortunately the zipfiles are far from complete, there are many MR BIOSes not included, but they're nonetheless extremely useful.

Added to uh19:
http://www.win3x.org/uh19/motherboards/5521

Eep386 wrote on 2021-09-13, 17:10:

Notice the one odd QS8888-12 chip next to the cache - there are unpopulated pads for an undocumented write-back 16Kx4 SRAM TAG chip there, so I fitted some round tooled pins and fitted beforementioned chip there. The effect on performance is substantial, from 22.70MB/sec to 40.21MB/sec memory bandwidth under SPEEDSYS 4.78, using a 486DX-33 CPU.

Hello
I also just got this board (MSI MS-4109) from a batch of "won't POST" boards from eBay. I don't think I did anything to it but check all the jumpers...
Anyway, it's running with a 486DX2-66. But the interesting thing is, mine is also missing the tag ram yet apparently outperforms your "memory throughput" in speedsys despite no modification and a CPU at half the clock rate. Weird.
Mine is VER: 1 instead of VER: 2.
In AMISETUP there is a hidden BIOS option for cache WT/WB and is set for WT. The system won't boot with it set on WB.
This one has 64K cache instead of 256K.
Cachechk speeds are similarly bad, don't know what you got but this is: 16 us/KB for L1, 24 us/KB for L2, and 53 us/KB for memory. (I was getting 16/24/70 and don't think I have changed anything so...)

Can you dump your BIOS? I am curious to see if I can get a similar or better result on my board with the dirty TAG fitted.
Also, may I see a picture of the board?

The cachechk results you got seem pretty in-line with what I got. My L1 and L2 scores were poorer because I was using a DX-33 CPU with several wait states on the memories at the time. Taking the waitstates off (after fitting faster memory and cache chips as well) brings the performance much closer to your board, the MR BIOS fitted screenshot is much more indicative of what I get.

This board takes 40 and 50MHz CPUs without batting an eye (there's no 1/5 divider for 40MHz so you have to use 1/4 with a 10MHz ISA bus), but it's almost not worth it as the Contaq chipset is one of those 386-486 do-either deals and doesn't really offer ideal bandwidth for a higher clocked 486. I certainly won't discount the possibility that the Contaq might work faster in write through mode once the option is unhidden.

Eep386 wrote on 2021-10-18, 17:25:

Can you dump your BIOS? I am curious to see if I can get a similar or better result on my board with the dirty TAG fitted. Also, […]
Show full quote

Can you dump your BIOS? I am curious to see if I can get a similar or better result on my board with the dirty TAG fitted.
Also, may I see a picture of the board?

The cachechk results you got seem pretty in-line with what I got. My L1 and L2 scores were poorer because I was using a DX-33 CPU with several wait states on the memories at the time. Taking the waitstates off (after fitting faster memory and cache chips as well) brings the performance much closer to your board, the MR BIOS fitted screenshot is much more indicative of what I get.

This board takes 40 and 50MHz CPUs without batting an eye (there's no 1/5 divider for 40MHz so you have to use 1/4 with a 10MHz ISA bus), but it's almost not worth it as the Contaq chipset is one of those 386-486 do-either deals and doesn't really offer ideal bandwidth for a higher clocked 486. I certainly won't discount the possibility that the Contaq might work faster in write through mode once the option is unhidden.

Here is the picture and BIOS ROM.
Regarding the WT setting, that is the default on my board. Setting WB using AMISETUP makes it not boot.
DRAM Read Wait State 0 W/S seems equivalent to 3 W/S, i.e., 1 W/S is the fastest.
I wonder if I could temporarily fit a resistor to this where the tag ram is to simulate always-dirty mode and test the WB setting that way. Why do you think they used a 16kx4 instead of a 16kx1? Or was there no such thing.

Thanks for the picture and BIOS dump!
A good number of 386/486 chipsets used 16Kx4 for dirty TAG memory, though I've ran into one that needed 64Kx1. I think that one was a Packard Bell 486 I used to own, that had an OPTi 495 chipset.

Eep386 wrote on 2021-10-19, 01:39:

Thanks for the picture and BIOS dump!
A good number of 386/486 chipsets used 16Kx4 for dirty TAG memory, though I've ran into one that needed 64Kx1. I think that one was a Packard Bell 486 I used to own, that had an OPTi 495 chipset.

Welp I found a 16kx4 for sale for less than $10, so I'll try your modification. The picture is 20ns but description is 25ns, hopefully the picture is right.

Eep386 wrote on 2021-10-19, 01:39:

Thanks for the picture and BIOS dump!
A good number of 386/486 chipsets used 16Kx4 for dirty TAG memory, though I've ran into one that needed 64Kx1. I think that one was a Packard Bell 486 I used to own, that had an OPTi 495 chipset.

Thanks for the tip. With the 16Kx4 SRAM added, I can use AMISETUP to set the cache mode to WB and it no longer hangs on boot (so, it works).
cachechk speeds are unchanged.
doom -timedemo demo3 improves from 4022 realtics to 3934 realtics.
speedsys "memory bandwidth" increases from 49.83 MB/s to 49.91 MB/s.
"Memory throughput" decreases from 32.54 MB/s to 29.83 MB/s, but looking at the graph, this is because move speed decreased, likely due to L2 miss penalty.

MSI isn't the only one to do this obviously, but I wonder why a functional component of the cache subsystem as tag ram gets dropped, yet a superflous feature like a Weitek 4167 socket was essential enough to keep.

I see one of the hidden options in this BIOS is parity check=Enabled. Wonder how much cursing was involved when people tried to add non-parity RAM on this board.

Who knows why manufacturers would prioritize a niche (even arguably fringe) component like a Weitek socket, when 10c was apparently too much to spend on a 16Kx4 TAG socket.

Shedding nearly 100 realtics is a small but not insignificant improvement, not entirely unlike what one might get from enabling the FIFO buffer on TVGA8900CL/D cards.

I added jakethompson1's image and bios to UR.net 😀
https://www.ultimateretro.net/motherboards/5521

Eep386 wrote on 2021-10-24, 15:13:

Who knows why manufacturers would prioritize a niche (even arguably fringe) component like a Weitek socket, when 10c was apparently too much to spend on a 16Kx4 TAG socket.

I wonder if the motherboard manufacturers got some kind of rebate from Weitek with some venture capital money in exchange for putting on the socket? heh