Depends what wait state configuration you want. The SiS 471 datasheet for example suggests that at 40MHz, 25 ns cache would require the slowest (3-2-2-2) but at 33 MHz, 25 ns would suffice for 2-1-1-1 for burst reads and "1 WS" for writes. Same idea goes for DRAM. Maybe your board's chipset datasheet is also out there and you can see what it calls for.

Just like with SDRAM and more modern memory, printed access time does not represent subtimings or wait states which chip might be capable of. 70ns FPMs were stuffed into early Pentiums, so they are totally capable to work at 60 Mhz, albeit with relaxed timings.

I'll have to check at home, what exactly the specs are on my 486. I have 50MHz FSB (CPU is at 3x50MHz) and with that, i was unable to use the tightest settings in bios (which is also modded to have all options available).

Cache chips were 10ns (Full 1024kB of it and potentially fake from china), RAM was 60ns. FSB is 50MHz and i think i had to loosen the cache timing by 1WS on the reading action and maybe something on the RAM as well. I have to confirm this.

Motherboard is SIS 471 based.

Maybe that gives at least some kind of ballpark feeling what specs can achieve 50MHz, and therefore what might be possible at other speeds.
In the end, you just have to test it yourself. DOOM is pretty good test - the demo starts behaving badly when anything is a miss in the system. The "3d bench" works also quite well to show errors - the elements on screen start to flicker.
https://www.philscomputerlab.com/dos-benchmark-pack.html