Reply 40 of 60, by Baoran
Chkcpu wrote on 2023-07-23, 16:10:Right, this may be the problem. The 80486DX4 jumper settings for the EXP4045 don’t support L1 cache WB mode! The iDX4 is basical […]
Baoran wrote on 2023-07-23, 13:48:Jumpers are set exactly like for 80486dx4 based on https://theretroweb.com/motherboard/manual/32985.pdf jumper manual except JP16 that controls the multiplier needs to be set to similar to 2x in the table in that pdf to get 4x multiplier.
Right, this may be the problem. The 80486DX4 jumper settings for the EXP4045 don’t support L1 cache WB mode!
The iDX4 is basically a L1 Cache WT only CPU. Okay, Intel later made a WB Enhanced DX4 version, but the jumpers for that model are not in this manual.A way out of this jumper hell is this nice resource:
http://ps-2.kev009.com/eprmhtml/eprmx/h12203.htm
In the table below the socket diagram, you can see that (except for the P24T) all WB capable 486 CPUs from Intel and AMD use the same pins for the essential L1 WB signals INV (A10), HITM (A12), CACHE (B12), and WB/WT (B13).The jumper settings for iDX4-WB, Am486DX2-WB, Am486DX4-WB, and Am5x86 are not in the manual. But luckily the settings for the P24D (i486DX2-WB) are, so you can use those for the Am5x86!
The only deviation of course is to keep the CPU Voltage selection on 3.3V!! 😉
Without the JP16 7-8 jumper, the Am5x86 should now run correctly in x3 multiplier and L1 cache WB mode with the v2.3 BIOS. I really hope this works!
Jan
Why JP32 closed turns on WB cache and it is aldo closed in dx4 settings then?