Nexxen wrote on 2023-10-22, 23:23:

I.e. I'm stuck with this? Any magic to unlock the RAM above 1MB?

Have you tried *removing* the DIP RAM (physically) from the board and *only* populating the 4 SIPPs? Preferably with 4x1MB SIPP modules using 9 physical ICs each - this is the most compatible.

maxtherabbit wrote on 2023-10-22, 23:34:

Nexxen wrote on 2023-10-22, 23:23:

I.e. I'm stuck with this? Any magic to unlock the RAM above 1MB?

Have you tried *removing* the DIP RAM (physically) from the board and *only* populating the 4 SIPPs? Preferably with 4x1MB SIPP modules using 9 physical ICs each - this is the most compatible.

I don't have 4x1MB SIPPs. 4x1 SIMMs yes, plenty.

As for now I'm waiting for simm slots to arrive.
Trying to make UMb_DRVR work, but I'm getting errors (Shadow ram test for segment E400) 😀
I lack a manual for it, just stuff oline.

Your idea is good, I'll do my best ASAP. Otherwise I'll solder legs and test. I've already soldered everything, NY people would ask "even Joe Mama?" , replying "yes, even Joe's Mama..." 🤣
Joke, no disrespect to Joe's Mama.

Need to find the MR BIOS for VLSI TOPCAT, if it can be found and works you have an alternate bios...

Horun wrote on 2023-10-23, 00:20:

Need to find the MR BIOS for VLSI TOPCAT, if it can be found and works you have an alternate bios...

Not specifically helpful but has anyone tried to find and archive these Mr Bios pages?

http://files.mpoli.fi/hardware/ROM/MRBIOS/

This was one 7 years ago

http://ww5.matrix-bios.nl/

Help with older 386 motherboard - Samsung Sensor PC - VLSI - VL82C320 / VL82C331

Has the op tried the topcat sx bios?

Nexxen wrote on 2023-10-23, 00:07:

I don't have 4x1MB SIPPs. 4x1 SIMMs yes, plenty. […]
Show full quote

maxtherabbit wrote on 2023-10-22, 23:34:

Nexxen wrote on 2023-10-22, 23:23:

I.e. I'm stuck with this? Any magic to unlock the RAM above 1MB?

Have you tried *removing* the DIP RAM (physically) from the board and *only* populating the 4 SIPPs? Preferably with 4x1MB SIPP modules using 9 physical ICs each - this is the most compatible.

I don't have 4x1MB SIPPs. 4x1 SIMMs yes, plenty.

As for now I'm waiting for simm slots to arrive.
Trying to make UMb_DRVR work, but I'm getting errors (Shadow ram test for segment E400) 😀
I lack a manual for it, just stuff oline.

Your idea is good, I'll do my best ASAP. Otherwise I'll solder legs and test. I've already soldered everything, NY people would ask "even Joe Mama?" , replying "yes, even Joe's Mama..." 🤣
Joke, no disrespect to Joe's Mama.

I just meant a quantity of 4 SIPPs with 1MB each

maxtherabbit wrote on 2023-10-23, 00:35:

Nexxen wrote on 2023-10-23, 00:07:

I don't have 4x1MB SIPPs. 4x1 SIMMs yes, plenty. […]
Show full quote

maxtherabbit wrote on 2023-10-22, 23:34:

Have you tried *removing* the DIP RAM (physically) from the board and *only* populating the 4 SIPPs? Preferably with 4x1MB SIPP modules using 9 physical ICs each - this is the most compatible.

I don't have 4x1MB SIPPs. 4x1 SIMMs yes, plenty.

As for now I'm waiting for simm slots to arrive.
Trying to make UMb_DRVR work, but I'm getting errors (Shadow ram test for segment E400) 😀
I lack a manual for it, just stuff oline.

Your idea is good, I'll do my best ASAP. Otherwise I'll solder legs and test. I've already soldered everything, NY people would ask "even Joe Mama?" , replying "yes, even Joe's Mama..." 🤣
Joke, no disrespect to Joe's Mama.

I just meant a quantity of 4 SIPPs with 1MB each

You solder legs and you're good to go, as someone suggested.
No problem, I got what you meant 😉

Why such old stuff always comes with huge collaterals in time spent????? 🤣

rmay635703 wrote on 2023-10-23, 00:31:

Not specifically helpful but has anyone tried to find and archive these Mr Bios pages? […]
Show full quote

Horun wrote on 2023-10-23, 00:20:

Need to find the MR BIOS for VLSI TOPCAT, if it can be found and works you have an alternate bios...

Not specifically helpful but has anyone tried to find and archive these Mr Bios pages?

http://files.mpoli.fi/hardware/ROM/MRBIOS/

This was one 7 years ago

http://ww5.matrix-bios.nl/

Yes ! Member jheronimus has made a good compilation from many sources and it is in our library here: http://www.vogonsdrivers.com/index.php?catid=77
Unfortunately the VLSI TOPCAT has not been found yet but is on the 2001 list at MR archive: https://web.archive.org/web/20011004222404/ht … :80/chipset.htm
see last entries...
for a list I made a HTM page from his Excel sheet for easier viewing even with old IE versions...(attached)

Thanks so far for all the inputs, it was a very instructive ride.

Nexxen wrote on 2023-10-23, 00:39:

Why such old stuff always comes with huge collaterals in time spent????? 🤣

🤣 not all old stuff is that way, but when you get a rare item like you have, it can come with a lot more work 😀
Am keeping in my "to do" search list for anything that could help...

Nexxen wrote on 2023-10-22, 22:18:

Replaced, the EMS driver provided on the TRW page works.

Wow, my driver made it to TRW! Would have been nice if the github page would have been linked, too: https://github.com/karcherm/topemm . Also thanks for the people at lo-tech for publishing the source of their LTEMM.SYS which this driver is based on.

Nexxen wrote on 2023-10-22, 22:18:

Edit: in pics it shows 288 because I enable shadowing in bios of vid card and bios.

As soon as you enable shadowing, you can't get extended memory / XMS. In case you don't enable any kind of shadowing, one could write a small DOS driver file (which does not stay resident and should be loaded before HIMEM.SYS) that reconfigures the chipset into remapping mode, so you can get 384K extended memory, to be used as 64K HMA + 320KB remaining XMS.

mkarcher wrote on 2023-10-23, 18:11:

Wow, my driver made it to TRW! Would have been nice if the github page would have been linked, too: https://github.com/karcherm/ […]
Show full quote

Nexxen wrote on 2023-10-22, 22:18:

Replaced, the EMS driver provided on the TRW page works.

Wow, my driver made it to TRW! Would have been nice if the github page would have been linked, too: https://github.com/karcherm/topemm . Also thanks for the people at lo-tech for publishing the source of their LTEMM.SYS which this driver is based on.

Nexxen wrote on 2023-10-22, 22:18:

Edit: in pics it shows 288 because I enable shadowing in bios of vid card and bios.

As soon as you enable shadowing, you can't get extended memory / XMS. In case you don't enable any kind of shadowing, one could write a small DOS driver file (which does not stay resident and should be loaded before HIMEM.SYS) that reconfigures the chipset into remapping mode, so you can get 384K extended memory, to be used as 64K HMA + 320KB remaining XMS.

Thanks for hopping in! I'll put the links in post #1.
I'll try to write a test configuration and get the maximum out of this board.

I have one question, why using shadow memory instead of allowing 1MB immediately? Is it a TOPCAT chipset limitation?
Is there any information from VLSI that could allow more than 1MB? Just curious.
Too bad it cannot see more than 1MB, as by my many tests I know it can use DIPP and SIPP and all slots combinations are connected to chipset. Or is it a BIOS thing only???

Nexxen wrote on 2023-10-24, 11:56:

I have one question, why using shadow memory instead of allowing 1MB immediately? Is it a TOPCAT chipset limitation?
Is there any information from VLSI that could allow more than 1MB? Just curious.
Too bad it cannot see more than 1MB, as by my many tests I know it can use DIPP and SIPP and all slots combinations are connected to chipset. Or is it a BIOS thing only???

The chipset supports four banks of memory. A bank consists of two SIPP slots or 6 DIP sockets. The chipset is quite flexible in what banks you populate and what banks you leave empty. Your board most likely has two chipset banks connected to the SIPP slots and the two other banks connected to the DIP sockets, so any kind of combination should work, if the combination of sizes is supported at all. Most configurations of the chipset set 384KB of RAM aside for use as shadow RAM or EMS pages, which is not available as extended memory. Obviously, a single bank of 512KB does not set anything aside. There are two special memory configurations that do not reserve 384KB of RAM for shadow/EMS stuff, those are a special 1MB configuration with 2 banks of 512KB and a special 2MB configuration with a single bank of two MB. It is up to the BIOS to select the memory configuration during the POST. So it is a BIOS thing whether it selects the standard 1MB configuration that reserves 384KB, or it selects the special 1MB configuration that provides 384KB of XMS.

mkarcher wrote on 2023-10-24, 18:41:

Nexxen wrote on 2023-10-24, 11:56:

I have one question, why using shadow memory instead of allowing 1MB immediately? Is it a TOPCAT chipset limitation?
Is there any information from VLSI that could allow more than 1MB? Just curious.
Too bad it cannot see more than 1MB, as by my many tests I know it can use DIPP and SIPP and all slots combinations are connected to chipset. Or is it a BIOS thing only???

The chipset supports four banks of memory. A bank consists of two SIPP slots or 6 DIP sockets. The chipset is quite flexible in what banks you populate and what banks you leave empty. Your board most likely has two chipset banks connected to the SIPP slots and the two other banks connected to the DIP sockets, so any kind of combination should work, if the combination of sizes is supported at all. Most configurations of the chipset set 384KB of RAM aside for use as shadow RAM or EMS pages, which is not available as extended memory. Obviously, a single bank of 512KB does not set anything aside. There are two special memory configurations that do not reserve 384KB of RAM for shadow/EMS stuff, those are a special 1MB configuration with 2 banks of 512KB and a special 2MB configuration with a single bank of two MB. It is up to the BIOS to select the memory configuration during the POST. So it is a BIOS thing whether it selects the standard 1MB configuration that reserves 384KB, or it selects the special 1MB configuration that provides 384KB of XMS.

Interesting.
Thanks.

I tried UMB_DRVR + TOPEMM but TOPEMM has issues.

UMB:
has been configured as: vvvv--vvsssUUUUUUUUUUsss (<-------- 24 pages, what topemm detects; this is my comment not umb's)
Dos base memory expansion = none
Upper memeory block (umb) area = 160K
Initialisation successful

Topemm: topcat emm driver r02
"128K unused shadow Ram detected.
page frame collides with shadow ram detected.
Installation failed - no ems available"

I trie different settings for umb but if I enter manually it just deisn't detect anything.
Could it be a hardware issue.

Topemm alone has 384K of mem

I thought UMB_DRVR was for 386 not 286 (double checked and no reference to using with 286 CPU in the doc's AFAIK)

Nexxen wrote on 2023-10-25, 22:38:

I tried UMB_DRVR + TOPEMM but TOPEMM has issues. […]
Show full quote

I tried UMB_DRVR + TOPEMM but TOPEMM has issues.

UMB:
has been configured as: vvvv--vvsssUUUUUUUUUUsss (<-------- 24 pages, what topemm detects; this is my comment not umb's)
Dos base memory expansion = none
Upper memeory block (umb) area = 160K
Initialisation successful

Topemm: topcat emm driver r02
"128K unused shadow Ram detected.
page frame collides with shadow ram detected.
Installation failed - no ems available"

I trie different settings for umb but if I enter manually it just deisn't detect anything.
Could it be a hardware issue.

Topemm alone has 384K of mem

EMS uses a 64KB "page frame" in the upper memory area. This space must not be used for any other purpose. If you load UMB_DRVR in default configuration, it fills the whole upper memory with UMBs, so there is no space left for the page frame. The page frame may be located between C000-CFFF and E000-EFFF, with start addresses aligned to 16K, so the possible page frame start addresses are C000,C400,C800,CC00,D000,D400,D800,DC00 or E000. I'm surprised by the UMB_DRVR layout: It displays shadow RAM in the ranges C000-CBFF, as well as F400-FFFF. It is very unusual for 286 systems to have the video ROM extend past C7FF. Do you have some other BIOS extensions (like the XT-IDE Universal BIOS) installed? Similarly, I'm unsure whether F400-F7FF needs to be shadowed, too. Maybe the F400-F7FF range can be reclaimed as UMB.

You need to read the UMB_DRVR configuration like this

1   x=048C
2Ax00 vvvv
3Bx00 --vv
4Cx00 sssU
5Dx00 UUUU
6Ex00 UUUU
7Fx00 Usss

So this means you have shadow RAM at the 16K blocks starting at C000,C400,C800,F400,F800 and FC00. You get that by looking at the locations of the "s" characters, replacing the x in the row label with the column label. The best page frame locations are at the start or at the end of the UMB area, so you don't split it. Furthermore you can't place the page frame at the end, because it would start at E400 then (the last four Us would need to "go away"), so the page frame could start at CC00. This means you need this configuration of UMB_DRVR instead:

1   x=048C
2Ax00 vvvv
3Bx00 --vv
4Cx00 sss-
5Dx00 ---U
6Ex00 UUUU
7Fx00 Usss

This is mentioned in the UMB_DRVR documentation

UMB_DRVR.DOC wrote:

If you use an EMS driver ( hardware or software emulation ), you should use the /M= parameter to force UMB_DRVR to exclude the E […]
Show full quote

If you use an EMS driver ( hardware or software emulation ), you
should use the /M= parameter to force UMB_DRVR to exclude the EMS base
area. Make sure you *DO NOT* have your driver try to map in the upper
memory ( 640K - 1M ) area ( other than the EMS base area ) - UMB_DRVR
has done that already ( refer to your driver's documentation ). You
should be able to use DEVICEHIGH/LOADHIGH to put your driver into upper
memory in most cases.

So try to use this parameters in CONFIG.SYS:

1DEVICE=UMB_DRVR.SYS /M=...........----.........
2DEVICE=TOPEMM.SYS /p:CC00

To not shadow C800-CBFF and F400 to F7FF (this will release 32KB of shadow RAM, making it available for EMS), you could also use

1DEVICE=UMB_DRVR.SYS /M=..........-----......-..
2DEVICE=TOPEMM.SYS /p:CC00

What would be the point of running both the UMB driver and the EMS driver with only 1MB ram ? at best it would give 64K of EMS at the cost of 64K of UMB.

weedeewee wrote on 2023-10-26, 12:09:

What would be the point of running both the UMB driver and the EMS driver with only 1MB ram ? at best it would give 64K of EMS at the cost of 64K of UMB.

It's slightly better than that, but the question is kind-of valid nevertheless. You will lose 64KB UMB to make space for the page frame, that's true. You can claim the 64KB of memory that you did not use for UMBs to make space for the page frame as EMS, which provides 64K EMS, that's true again. But there is more memory around that can be claimed by the EMS driver: The 128KB of RAM "hidden behind" the VGA RAM space A000-BFFF, so that will give you 192KB of EMS at the cost of 64KB UMB.

mkarcher wrote on 2023-10-26, 15:11:

The 128KB of RAM "hidden behind" the VGA RAM space A000-BFFF, so that will give you 192KB of EMS at the cost of 64KB UMB.

mmh, yes. Isn't that what the relocation should do? Allow access to that otherwise overlapping piece of memory.
How does the computer distinguish between memory accesses to the VGA memory and that RAM memory which is hidden due to being overlapped in address space by the VGA memory access window?

weedeewee wrote on 2023-10-26, 15:19:

mkarcher wrote on 2023-10-26, 15:11:

The 128KB of RAM "hidden behind" the VGA RAM space A000-BFFF, so that will give you 192KB of EMS at the cost of 64KB UMB.

mmh, yes. Isn't that what the relocation should do? Allow access to that otherwise overlapping piece of memory.
How does the computer distinguish between memory accesses to the VGA memory and that RAM memory which is hidden due to being overlapped in address space by the VGA memory access window?

Yeah, that's what relocation is supposed to do. The TOPCAT chipset this thread is all about only supports full 384KB relocation or no relocation. Partial relocation of RAM is not implemented in hardware. The AMI BIOS of the OP does not seem to enable relocation at all, even if it were possible (it's only possible with four 256KB SIPPs or two 1MB SIPPs, or the equivalent amount of RAM as DIP chips). The OP is currently facing a no-relocation behaviour, so the memory "behind" the VGA is lost.

The hardware EMS engine can map any physical RAM to the page frame. This also applies to RAM at addresses A000-FFFF. The hardware EMS engine always maps physical RAM into the page frame, it does not map "ISA address space". So it is perfectly valid and not ambigous to map the physical memory at address A000 into the page frame at e.g. E000, allowing the processor to access the RAM "behind the VGA" by accessing the page frame. Obviously, if the RAM at A000-A3FF is mapped to the first page of E000-E3FF, you can't access the physical memory at E000-E3FF at that FSB address - but this is exactly what EMS is all about: You get a standardized API to remap which memory is visible in the page frame, so software can instruct the EMS driver to switch as desired. TOPEMM is able to map any memory not in use for conventional memory, UMBs, ROM shadowing or extended memory into the page frame. TOPEMM makes most sense if end of extended memory is lower than the actual amount of physically installed memory, so there is a significant amount of unused physical RAM after the extended memory, because all this RAM can be claimed as EMS. Most sensible TOPCAT BIOSes allow the user to enter an extended memory size that is less than the physically installed memory to reserve some RAM for EMS.

The chipset can address up to 8 4MB modules, resulting in 32MB of RAM (I don't know whether the DIP sockets are able to accomodate 4Mx4 / 4Mx1 chips, so it might not work on this board). As the TOPCAT SX targets the 286 and 386SX processors, the maximum amount of conventional + extended memory is just short of 16MB, the remaining 16MB+x can only be used for EMS purposes.