In terms of clockspeed, they will probably be limited.
This is because transistors have more or less 'fixed' transition times. They are not affected by a smaller process. The trick is to design an architecture that is a good balance between the amount of transistors you can put on a chip, and the amount of IPC you can extract from them.
Namely, with modern CPUs, you pipeline operations in a number of different stages. If you can put more transistors into a chip, you can cut up the pipeline into more states, where each stage will have a shorter chain of transistors, resulting in a shorter processing time (the transition time is the same, but there are less transistors in a dependent chain, so the accumulated/worst case transition time of the entire stage is shorter).
This means there is more or less a 'hard limit' of clockspeed for every CPU architecture. And the older the CPU architecture is, the lower that clockspeed will be. Depending on how well the designers gauged the expected performance of the manufacturing process(es) used for the CPU, the original products may already be reasonably close to the limit (Pentium 4 is an excellent example of an overly ambitious CPU, where the architecture was designed for 5+ GHz, but manufacturing problems meant that these speeds never materialized... although with supercooling, overclockers have pushed them past 8 GHz).
The more interesting approach here would be massive parallelism: A 486 or Pentium core is very small by today's standards. You could put hundreds of them on a single chip with today's technology.
In fact, that is more or less what Intel thought with their Larrabee GPGPU architecture: They took a Pentium-ish core as the basis, with a reasonably short pipeline, and added very wide SIMD units to that core. Then they could put a large number of them on a single chip, to get a massively parallel processor, not too dissimilar from products from AMD and nVidia (as you may know, GPUs tend to also run at much lower clockspeeds than CPUs, because they also prefer many simple cores with relatively short pipelines over a few 'deep' pipelines like in CPUs).