TNDLPT : Tandy Sound on parallel port

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Re: TNDLPT : Tandy Sound on parallel port

Postby dreamblaster » 2018-1-11 @ 20:54

hey guys
you are very creative.

I added an inverter to avoid such random writes on powerup, but probably that will not enough then, if I read it here.
If the chip makes noise by default when powered, I may just add a transistor to switch the supply on using an output on the parallel port.
The TSR driver can then switch on the power right before it initializes, and then send these bytes to shut it up.
During boot time the chip would be powered off.

we'll see, if this is needed, I add it to a next revision.
right now it are prototypes anyway
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Re: TNDLPT : Tandy Sound on parallel port

Postby Scali » 2018-1-11 @ 21:06

Yea, the parallel port would require some software to control it anyway, so having some startup code in the TSR would work fine for the TNDLPT.
The problem is more with the ISA card. A real PCjr or Tandy has the 4 volume commands in the BIOS, so it shuts off as soon as the machine starts.
Some software may rely on this. That is, you could put a mute-circuit on there, but if you don't actually shut off the channels, it may be possible that some games only use a few channels, and therefore never set the unused channels muted at all. So they will continue to play garbage.
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Re: TNDLPT : Tandy Sound on parallel port

Postby chartreuse » 2018-1-11 @ 21:58

Scali wrote:The problem is more with the ISA card. A real PCjr or Tandy has the 4 volume commands in the BIOS, so it shuts off as soon as the machine starts.
Some software may rely on this. That is, you could put a mute-circuit on there, but if you don't actually shut off the channels, it may be possible that some games only use a few channels, and therefore never set the unused channels muted at all. So they will continue to play garbage.


If you really wanted with an ISA card you could add a small boot ROM to it so that it'll mute the chip very early in the boot process, you could also combine that with the transistor power-off trick, having the chip powered off until the boot ROM specifically enables it.
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Re: TNDLPT : Tandy Sound on parallel port

Postby Scali » 2018-1-11 @ 22:19

chartreuse wrote:If you really wanted with an ISA card you could add a small boot ROM to it so that it'll mute the chip very early in the boot process, you could also combine that with the transistor power-off trick, having the chip powered off until the boot ROM specifically enables it.


Yes, but there are three problems with that approach:
1) You would need to be able to program a ROM.
2) The card can be configured to various different IO ports, each port would require a different ROM, as there is no way to autodetect the card (although that could be added as well, similar to the GameBlaster).
3) You don't know when an extension ROM is executed. It could be after the POST, which means you're still listening to an annoying beep for a long time, so the solution is barely any better than just putting a simple program in the autoexec.bat, as we currently do.

The solution with a counter is probably about as simple and cheap as a ROM in terms of parts/cost, but is more elegant, and doesn't require any equipment to create the ROM.
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Re: TNDLPT : Tandy Sound on parallel port

Postby chartreuse » 2018-1-11 @ 22:34

Scali wrote:1) You would need to be able to program a ROM.
2) The card can be configured to various different IO ports, each port would require a different ROM, as there is no way to autodetect the card (although that could be added as well, similar to the GameBlaster).
3) You don't know when an extension ROM is executed. It could be after the POST, which means you're still listening to an annoying beep for a long time, so the solution is barely any better than just putting a simple program in the autoexec.bat, as we currently do.


1) With a modern EEPROM such as a 28C64 which doesn't require a programming voltage, you could simply program the ROM in-circuit from DOS. ala XTIDE.
2) You could set-up some kind of probing, or even just a latch that has the state of the jumpers that could be read back. Alternatively you could have a software config utility that programmed the settings into a section of the flash EEPROM.
3) That's why you would also include the disabling circuitry, a transistor or latch that cuts power to the chip until explicitly initialized by the boot ROM.

Though honestly thinking about it, all this could also just be done is software as well, the boot ROM would just be a convenience not to have to run a program in autoexec. Really the main thing you need is the power off circuitry, that is only enabled by a IO write or such from software. The configuration could be done by command line flags specifying Ports IRQs and such.
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Re: TNDLPT : Tandy Sound on parallel port

Postby Great Hierophant » 2018-1-11 @ 23:14

If you had games that had been patched to direct their writes to a parallel port instead of the canonical Tandy sound port, a simple initialize program sufficient to "turn the device on" and should work on an 8088 or better CPU. It is conceivable you could do it with one of the inverters on the '04 connected to a control port line and the chip enable pin of the 76496. If the chip makes sound even if the chip enable is disabled, then instead use a transistor to turn on the audio output. If you are hacking a booter, then you should put in the silence code in your hack, but that only takes a few bytes of space.
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Re: TNDLPT : Tandy Sound on parallel port

Postby dreamblaster » 2018-1-11 @ 23:33

yes that's what I did on the TNDLPT, used the inverter on the chip enable (controlled by parallel port output)
but I am not sure it will silence the chip. (Otherwise I will make the voltage interruptor in a next revision).

you could do the same on an isa card en just have a small program in autoexec just enable the supply and send the reset commands
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Re: TNDLPT : Tandy Sound on parallel port

Postby gdjacobs » 2018-1-12 @ 06:02

Scali wrote:The problem is two-fold:
1) A uC requires programming, so it will be more difficult for people to build their own. They not only need to solder a kit, but they also need to have the equipment to program the uC.

Flashing a uC is generally a lot easier than building a moderately complex pcb. Certainly not the same skill set, but it's a handy and useful thing to know how to do when working in embedded, so not generally a stretch to ask for it.

Scali wrote:2) How do you determine when to mute, and when to unmute? (preferably you don't want to rely on some DOS utility, to maintain compatibility with booters, since early PCjr/Tandy games were booters).

Hierophant mentioned the trick would be ensuring no output until it's time for playback. How is it done with an actual PCjr or Tandy, both on bootup and between Tandy aware titles running? The goal should be replicating that behavior, I would think.

Scali wrote:Aside from that there's a decided anachronism and lack of elegance in using a microcontroller for such a simple 80s device.
I'd much prefer a simple discrete solution if one exists.

Fair enough. I was thinking of a bridge card that supports configurations of all the Serdaco LPT sound outputs (not at the same time), but an improved Low-Tech card would certainly be great, especially for new built Sergei 8088XT machines (such a delicious combo). Beyond constraints of practicality, I really have no preference.

Scali wrote:I personally think that just having an easy to access volume knob, or even a mute switch on the device would be good enough. Simple and cheap to build, and very effective.
Other than that, I have suggested using some kind of adder circuit, which generates the proper sequence of volume commands on-the-fly. Would probably be simpler and cheaper than a uC, and also true to simple 80s tech.

Implementing a state machine in bubblegum logic can get quite expensive, depending on the sequence required. Ironically, the simplest way to do this in general is probably still to use a ROM. It might be possible to drive the ROM with a counter, "free run" the ROM, or expose a BIOS option to properly handle the Tandy chip via CPU. Systems using XTIDE could build support right in once the module is developed. A uC would really only be useful if you want the interface to be mutable to support different sound devices.
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Re: TNDLPT : Tandy Sound on parallel port

Postby Scali » 2018-1-12 @ 11:47

gdjacobs wrote:Flashing a uC is generally a lot easier than building a moderately complex pcb. Certainly not the same skill set, but it's a handy and useful thing to know how to do when working in embedded, so not generally a stretch to ask for it.


It is? I have no idea how to flash a uC, or what kind of tools will be required.
Soldering some components onto a PCB, that I can do.

gdjacobs wrote:Hierophant mentioned the trick would be ensuring no output until it's time for playback. How is it done with an actual PCjr or Tandy, both on bootup and between Tandy aware titles running? The goal should be replicating that behavior, I would think.


PCjr and Tandy do not actually mute the output.
They just send the volume commands ASAP on powerup.
I agree that trying to replicate the volume commands is the goal. But that means that a mute circuit is not required.
And as explained before, having a mute circuit does not solve the need for sending these volume commands at some point.
The only reason why you would need a mute circuit is to keep the machine silent until you can send the commands, if you cannot send the commands immediately on powerup.

gdjacobs wrote:an improved Low-Tech card would certainly be great


I think a lot of people would like a lo-tech card, even the first revision.
But if a new batch of PCBs is to be made, I would suggest at least some small fixes, mainly fixing the circuit so we no longer need the two patch wires, and making the volume knob accessible externally. That way you could at least mute it manually. A 'kill switch' would also be nice, so you can leave the volume in the preferred position.

gdjacobs wrote:Implementing a state machine in bubblegum logic can get quite expensive, depending on the sequence required.


But as we already explained, the sequence is simply:
9F (10011111)
BF (10111111)
DF (11011111)
FF (11111111)

So as you can see, most bits are always 1 in this sequence, and only bits 6 and 7 count up linearly in this sequence. That is why the counter makes so much sense. It generates the sequence directly.
If you use a 4-bit adder, you could use the two most significant bits for the sequence, and bit 1 to toggle the CE and WR lines.
You can use the carry to shut the circuit off after the sequence has been completed (all the '1' bits could be generated by inverted carry perhaps... carry driving some and ports or whatever for muxing).

I think the circuit could be started by (!RESET AND CLK). That is, if I'm not mistaken, the RESET line is asserted for a short while on powerup. So you don't start counting until the RESET went low, to give the SN76496 some time to initialize itself before sending the commands.

Now, I don't have the engineering skills to make this into a complete circuit, but I think my suggestion got us 90% there already.
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Re: TNDLPT : Tandy Sound on parallel port

Postby gdjacobs » 2018-1-12 @ 13:33

Scali wrote:It is? I have no idea how to flash a uC, or what kind of tools will be required.
Soldering some components onto a PCB, that I can do.

It depends on the micro. ISP programming can be done with a $5 AVR nano board, some jumpers, a few coupling caps, and a breadboard. You can get fancy and use status LEDs if you want.

Scali wrote:PCjr and Tandy do not actually mute the output.
They just send the volume commands ASAP on powerup.
I agree that trying to replicate the volume commands is the goal. But that means that a mute circuit is not required.
And as explained before, having a mute circuit does not solve the need for sending these volume commands at some point.
The only reason why you would need a mute circuit is to keep the machine silent until you can send the commands, if you cannot send the commands immediately on powerup.

[...]

But as we already explained, the sequence is simply:
9F (10011111)
BF (10111111)
DF (11011111)
FF (11111111)

So as you can see, most bits are always 1 in this sequence, and only bits 6 and 7 count up linearly in this sequence. That is why the counter makes so much sense. It generates the sequence directly.
If you use a 4-bit adder, you could use the two most significant bits for the sequence, and bit 1 to toggle the CE and WR lines.
You can use the carry to shut the circuit off after the sequence has been completed (all the '1' bits could be generated by inverted carry perhaps... carry driving some and ports or whatever for muxing).

I think the circuit could be started by (!RESET AND CLK). That is, if I'm not mistaken, the RESET line is asserted for a short while on powerup. So you don't start counting until the RESET went low, to give the SN76496 some time to initialize itself before sending the commands.

Now, I don't have the engineering skills to make this into a complete circuit, but I think my suggestion got us 90% there already.


I see. Certainly one of the simplest set of states possible. You'd still need latches and maybe tri-state buffers to (1) preserve bits like chip enable and (2) isolate the counter from the command pins when the sequence is complete.
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Re: TNDLPT : Tandy Sound on parallel port

Postby Scali » 2018-1-12 @ 13:49

gdjacobs wrote:I see. Certainly one of the simplest set of states possible. You'd still need latches and maybe tri-state buffers to (1) preserve bits like chip enable and (2) isolate the counter from the command pins when the sequence is complete.


Yes, but I bet there's already some kind of 74xx IC that gives us what we need for multiplexing/buffering. I suppose this is a common problem when designing expansion cards: you'll often want to be able to control part of the circuitry either via the bus/CPU or via onboard logic.

And as I said, CE and WR can be toggled with one of the bits of the counter (the chip just performs an AND on CE and WR, I think they only split the signals because most buses allow both reading and writing, so you'd need a separate chip enable line. The SN76496 doesn't support reads, so there is no read line for the chip. Semantically, CE is used for addressing, and WR is used to control writing. In our case, we could just connect CE and WR to the same output).
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Re: TNDLPT : Tandy Sound on parallel port

Postby Great Hierophant » 2018-1-12 @ 15:26

As the PCjr. and Tandy BIOSes silence the chip's four sound channels on bootup, it is quite possible that a game that does not use all four channels relies on the BIOS' silencing of the unused channels.
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Re: TNDLPT : Tandy Sound on parallel port

Postby gdjacobs » 2018-1-12 @ 18:23

Scali wrote:Yes, but I bet there's already some kind of 74xx IC that gives us what we need for multiplexing/buffering. I suppose this is a common problem when designing expansion cards: you'll often want to be able to control part of the circuitry either via the bus/CPU or via onboard logic.


Sure.
http://www.farnell.com/datasheets/18786.pdf

It doesn't let you set a mask word for the tri state outputs, though, so either all pins are enabled or none. One thing I'm not clear on, though, and the datasheets don't say. Does the chip fully halt when CE is high or is it only pulled low when you want to strobe in more data? Of it's the latter, plain octal tri state buffers might be enough without something else to maintain CE.

To amplify what you said, the init circuit could strobe in high attenuation for all four audio generators (three MSB). The five LSB pins would have to count through between each word pumped into the SN76496 as the chip requires the data pins be held steady for 32 clocks for the registers to properly store and configure. Last, the overflow can be used to tri state the whole initialization circuit from the tone generator when it's job as done (except perhaps CE).

Also, the 74x59y series chips do have onboard buffering, but some of the data pins which would need tri-stating are simply tied low, so independent tri-state buffers would probably be necessary.
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Re: TNDLPT : Tandy Sound on parallel port

Postby Scali » 2018-1-12 @ 19:01

gdjacobs wrote:It doesn't let you set a mask word for the tri state outputs, though, so either all pins are enabled or none. One thing I'm not clear on, though, and the datasheets don't say. Does the chip fully halt when CE is high or is it only pulled low when you want to strobe in more data? Of it's the latter, plain octal tri state buffers might be enough without something else to maintain CE.


I think it is the latter. There is a block diagram in the datasheet, which simply shows that CE and WR go into an AND gate, which is used to enable data input.
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Re: TNDLPT : Tandy Sound on parallel port

Postby gdjacobs » 2018-1-12 @ 19:16

Yes, but it says nothing about the oscillators. I suspect it's just for chip addressing as well, but I'd prefer not to guess.
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Re: TNDLPT : Tandy Sound on parallel port

Postby Scali » 2018-1-12 @ 19:37

gdjacobs wrote:Yes, but it says nothing about the oscillators. I suspect it's just for chip addressing as well, but I'd prefer not to guess.


One of the errata of the lo-tech card deals with Chip Enable:
https://www.lo-tech.co.uk/wiki/Lo-tech_ ... nd_Adapter
IC1 pin 2 should be belt out (so it doesn't make contact with the socket) and jumpered to IC3 pin 5 (/IOW signal). This modification masks the Chip Select signal generated by the '688 with the ISA IOW signal because the SN76489 de-asserts READY immediately on response to Chip Select, which differs from the ISA use of this signal in response to the command (IOR, IOW, MEMR or MEMW).


The original design just connected the address decode directly to the CE pin, as you can see here: https://www.lo-tech.co.uk/w/images/8/8e ... er-r01.png

See here for the original discussion on the fix: http://www.vcfed.org/forum/showthread.p ... post438174

But anyway, since the CE on the Tandy card is generated only on the address, it certainly isn't 'always on', and so we know it doesn't affect the oscillators.
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Re: TNDLPT : Tandy Sound on parallel port

Postby matze79 » 2018-1-13 @ 08:18

Hm James Design is using a clock divider right ?
if isa bus is overclocked the SN Chip does runs with wrong clock

photo_2018-01-13_09-16-18.jpg


also collected some parts togehter.. to build the tandy card and send it later to pcb fab.
my idea was to simple use a i/o port and switch the tandy chip on via a simple program on boot.

almost no time, and limited knowledge is slowing me down :)
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Re: TNDLPT : Tandy Sound on parallel port

Postby Scali » 2018-1-13 @ 12:24

matze79 wrote:Hm James Design is using a clock divider right ?
if isa bus is overclocked the SN Chip does runs with wrong clock


It shouldn't be.
There are two clock signals on the ISA bus, one is the actual bus clock (CLOCK). The other is a fixed NTSC clock (OSC):
http://pinouts.ru/Slots/ISA_pinout.shtml
The SN should be wired to the NTSC clock signal, which is not affected by overclocking the bus.
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Re: TNDLPT : Tandy Sound on parallel port

Postby dr.zeissler » 2018-1-13 @ 12:59

the next BIG stuff should be an all in one device:
- Covox (stereo)
- OLP2LPT
- OPL3LPT
- DSS
- TSS
and switchable per software so you can "configure" the device in a batch before starting the game :)
CPU: PII 133-333 MOBO: SNI-D981 RAM: 512- FDD: Dualfloppy 3,5"HD/5,25"HD - 3,5"HD - 5,25"DD ISA-Catweasel HDD: 2x40GB - DVD
ISA(3): Audician32-S2Dreamblaster - GusACE PCI(3): Monster3D- Intel NW AGP(1): 3dfx V3-3000
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Re: TNDLPT : Tandy Sound on parallel port

Postby matze79 » 2018-1-13 @ 13:03

Scali wrote:
matze79 wrote:Hm James Design is using a clock divider right ?
if isa bus is overclocked the SN Chip does runs with wrong clock


It shouldn't be.
There are two clock signals on the ISA bus, one is the actual bus clock (CLOCK). The other is a fixed NTSC clock (OSC):
http://pinouts.ru/Slots/ISA_pinout.shtml
The SN should be wired to the NTSC clock signal, which is not affected by overclocking the bus.


Ah thanks, i didnt know that :)
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