newold86 wrote:It's exactly why I have mentioned "a few 74xx ICs"... Also looked into CPLD + MCU scenario - still possible to get 5V tolerant CPLDs...
"Soft" MCU inside of FPGA seems most logical, but requires a lot of LEs AND memory - up to a need of external memory chips. Smaller FPGA + MCU seems more logical, but I don't like this approach on principle, doesn't look clean...
It's exactly what I have mentioned before (about audio processing) - so easy with FPGA ! At the moment playing with IIR filter for converting a sample rate - SOO cool !
74 chips aren't going to be worth it, you need too many of them to do anything interesting and the cost of them all plus time to put them on the board makes a CPLD way more attractive. 5V tolerance should be completely forgotten though, you have lot less parts, and lot more expensive parts aswell to choose from. Those level translators are going to be a very minor issue and visually they'll look like some EISA or VLB card with all the address and data latches 🤣. Or you can be super lazy and rely only on current limiting (not recommended for any serious thing)...
I'm not a super big fan of a soft core in an FPGA, especially when it makes no economic sense. Some small ARM chip + FPGA will cost way less than just FPGA that can hold equivalent of that ARM chip also.
From my experience, only the really complicated resamplers produce good results, simple IIRs and FIRs don't really cut it. But in a big enough FPGA you can do whatever anyway. There is still the problem of analog side mixing, having an ADC per input isn't super great and good digital pots are still really expensive. One can always have array of pots on the edge of the card though and single ADC, it isn't like you normally change mix levels a whole lot anyway and the digital sources such as SB, WSS and FM can be done all in digital domain.