Does the vga bios for that card have a function that writes to that register/bit?
Do other drivers exist that use that register/bit ?

The video BIOS contains code to set bits 6-7 of CRTC register 0x31. See part of it in the following Ghidra disassembly. The clock select value to be programmed is in CH. Then it puts one bit into the (documented) "clock-select 2" bit of CRTC register 0x34, and the rest into CRTC register 0x31:

(Note, though, that I run this card in a non-x86 system. So the video BIOS does not get executed and I can't say which specific values would be written into the register.)

There is (in an IBM PS/2 document) a reference to a newer ET4000 data book, dated 1992. But no one seems to have scanned it?

Much of the VGA chips especially WD were made to interface with MCA bus as well but in practice I didn't see any produced besides cirrus logic.

Cheers,

To be clear: I merely used the citation from the IBM document as evidence that a newer data book exists for the ET4000; newer than the 1990 edition that is on Bitsavers and archive.org. This thread is still about an ISA card.

pentiumspeed wrote on 2023-02-06, 00:20:

Much of the VGA chips especially WD were made to interface with MCA bus as well but in practice I didn't see any produced...

I found at least 2 : "Matrox Magnum Graphics Controller MG-104, MG-108" and even all the software IBM released for them is preserved:

Re: 8bit PVGA1A OEM VGA for Olivetti. Drivers ?

but I confused WD95C01 with WD90C01, the real chip used in those is WD95C01.

I got to test an the older revision of the ET4000, marked TC6058AF. In that revision, the chip behaves as described in the 1990 data book:

• Pins 12 and 109 act as output enable for the video RAM,
• CRTC register 0x31 does not exist. I.e., it always reads back as zero, regardless of what you write to it.

In contrast, as described above, in the newer TC6100AF revision of the ET4000...

• pins 12 and 109 can be used as additional general purpose outputs, e.g., connected to the clock generator;
• they are controlled by bits 6-7 of CRTC register 0x31, which can also be read back.

Since no one so far came up with the updated edition of the data sheet, there's no way of knowing what other features were added to the TC6100AF revision.

PS: I forgot to mention: In the newer ET4000 (TC6100AF), the newly added, undocumented CRTC register 0x31 seems to work exactly as on the later ET4000W32i. As described, bits 6-7 control the clock select lines. Bits 4-5 are not implemented and always read back as 0. Bits 0-3 can be written and read, and probably serve as "scratch bits" without any functionality behind them.

Can someone explain in layman's terms what the effect of this difference would be for an end user?

If the graphics card manufacturer took advantage of the additional clock select pins – like on the card that started this thread – he could easily have the card select between more than the usual 8 pixel-clock frequencies. For the end user: If the video BIOS and/or driver knows about this, this can add more video modes or additional refresh rates to existing video modes.

(And in my case: I'm not an end user; I work on low-level drivers for these cards.)

mxmxmx2 wrote on 2023-02-17, 17:26:

If the graphics card manufacturer took advantage of the additional clock select pins – like on the card that started this thread – he could easily have the card select between more than the usual 8 pixel-clock frequencies. For the end user: If the video BIOS and/or driver knows about this, this can add more video modes or additional refresh rates to existing video modes.

(And in my case: I'm not an end user; I work on low-level drivers for these cards.)

Okay, good to know! I was just curious as to what it meant from a practical standpoint, and I can see now why that'd be a big deal.

Also, thank you for your time in doing this. Not many people are out there doing driver work to expand the capabilities of vintage hardware. 😀