It's generally compatible and faster than ISA video cards, at least most of them. That's about it.
May or may not have annoying vertical columns on "modern" digital displays in certain modes. Also may have problems with VESA modes if PC has 16 Mb RAM or more.

If not that easy, maybe it would be better to look for a card that already has 2MB?

2 Mb is practically useless for all 542x series cards due to crappy RAMDAC.

Overall: serviceable for VGA/Mode X games and simple GUI interface of Windows 3.1.

And do not forget the 14M problem if the card has no own 14.318MHz oscillator, like many Cirrus cards.

null

I never tried the 5426 but I tried the faster and more advanced engine of the 5429 and compared to the ISA same version and also obviously thank to the 80486 (even DX2) the jump was impressive in every games. VLB together with a 486 make a great msdos machine even if there're probably even better but expensive cards. Of course it depends on which CPU it will be installed together with.

The CL-GD5426 is a basic entry-level local bus graphics chip. It's usually faster than the best ISA graphics cards, because it communicating with the processor at full front-side bus speed, but it still processes only 16 bits a time. Regarding performance, it's at the low end what's acceptable for a VLB graphics cards. A nice thing about Cirrus based VL cards: Most of them have VESA 1.2 support built into the ROM, so no need to look for a separate VESA driver like UNIVBE/Scitech Display Doctor. Linear Framebuffer is problematic on these cards, as they often only support a 16M address space, so the framebuffer collides with RAM if you have 16MB or more installed. This isn't necessarily a problem, but it makes the "missing" VESA 2.0 support less of an issue.

The RAM upgrade requires two standard (fast page mode) DRAM chips of the "256K x 16" kind in SOJ case. They were very common and easily obtainable those days. The upgrade chips should be at least as fast as the already installed chips. I'm unsure about availability today, but you can find them on lots of 1MB and 2MB PCI graphics cards. Maybe you have a broken one as donor board, or you can get a very basic 1MB PCI graphics cards for next-to-nothing, just to "steal" the memory.

Thank you everyone for your responses. Looks like this card is not that interesting, so I'll wait for something else. Don't need it urgently now.

mkarcher wrote on 2021-09-07, 20:37:

The CL-GD5426 is a basic entry-level local bus graphics chip. It's usually faster than the best ISA graphics cards, because it communicating with the processor at full front-side bus speed, but it still processes only 16 bits a time. Regarding performance, it's at the low end what's acceptable for a VLB graphics cards. A nice thing about Cirrus based VL cards: Most of them have VESA 1.2 support built into the ROM, so no need to look for a separate VESA driver like UNIVBE/Scitech Display Doctor. Linear Framebuffer is problematic on these cards, as they often only support a 16M address space, so the framebuffer collides with RAM if you have 16MB or more installed. This isn't necessarily a problem, but it makes the "missing" VESA 2.0 support less of an issue.

I was thinking about these early Cirrus VLB chips the other day. Given that they only use 16 data bits and (on at least some cards) 24 address bits, how different are those chips from an ISA one that runs on a hypothetical, extremely overclocked ISA bus that operates at 33, 40, or 50 MHz? Or are there deeper differences than that in the signaling, wait states, etc.

The ISA bus runs at 7-8mhz standard but can operate at 11 and maybe a bit more or so with certain cards that can handle that.

Actually I realised You are talking about the memory chips that can be on the VLB card as well as 72 pin memory sticks.
That makes me wonder why the 25ns EDO memory on Voodoo 2 cards cannot be used as 72pin memory modules, unless it's because they are 16 bit?

Imperious wrote on 2023-05-04, 00:18:

The ISA bus runs at 7-8mhz standard but can operate at 11 and maybe a bit more or so with certain cards that can handle that.

Right, but what I'm asking is how much difference is there between a VLB device that only does 16-bit writes and reads (and ignores address bits above bit 23) and a severely overclocked ISA device. I think of such weird things.

jakethompson1 wrote on 2023-05-03, 22:33:

I was thinking about these early Cirrus VLB chips the other day. Given that they only use 16 data bits and (on at least some cards) 24 address bits, how different are those chips from an ISA one that runs on a hypothetical, extremely overclocked ISA bus that operates at 33, 40, or 50 MHz? Or are there deeper differences than that in the signaling, wait states, etc.

The VL protocol is quite different from the ISA protocol, because in VL all signals are synchronous and only sampled on a specific edge of the bus clock, whereas on ISA, read/write cycles are only timed by the respective control signals. VL has a master "start a cycle" signal (/ADS), whereas ISA has dedicated start signals for every kind of cycle. But the timing characteristic is similar: Both ISA and VL allow a cycle to be completed in two clocks (0WS). In theory, there are burst cycles defined on VL, but they are only meant for cachable memory, and video memory is uncached.

So if your question is like "could the ET4000AX, if it supported ISA at 33MHz have similar performance on that kind of bus as the CL-GD542x on VL at 33MHz", the answer is: Yes, it could. If your question is more like "Could I just hook up the CL-GD542x in VL mode to an severely overclocked ISA bus", the answer is: No, the VL protocol is quite different. The Cirrus chips might support an ISA mode, though, I would need to check the data sheet. Multi-Protocol graphics chips (ISA, MCA, VL) were quite common those days. They are configured by pull-up or pull-down resistors on certain signals (e.g. the video memory data signals on S3 chips).

Imperious wrote on 2023-05-04, 00:18:

That makes me wonder why the 25ns EDO memory on Voodoo 2 cards cannot be used as 72pin memory modules, unless it's because they are 16 bit?

They can. But the modules would have quite low capacity. These chips are 256K x 16 bit, so one could make a 32-bit SIMM using two of them. It would have 1MB capacity. You can also build a double-sided SIMM with 4 of those chips, at 2MB capacity. Later cards used 1M x 16 chips that are also available with quite fast access times, so 4MB and 8MB SIMMs with very fast DRAM seem possible, too. I don't think you can easily find bigger ultra-fast EDO DRAM chips.

jakethompson1 wrote on 2023-05-03, 22:33:

I was thinking about these early Cirrus VLB chips the other day. Given that they only use 16 data bits

All CL VLB cards still wire full full 32bits. Im not sure why 😀 Cirrus Logic datasheet is hardwired for 16bit transfers to:
- A0000-BFFFF
- Linear framebuffer (vesa LFB) in 15-16MB hole

jakethompson1 wrote on 2023-05-03, 22:33:

how different are those chips from an ISA one that runs on a hypothetical, extremely overclocked ISA bus that operates at 33, 40, or 50 MHz? Or are there deeper differences than that in the signaling, wait states, etc.

you cant overclock ISA bus that high 😀, the best OC I saw was around 16MHz, and still <10MB/s transfer speed. DX2/80 with CL VLB does 15MB/s and isnt slowing CPU down between transfers Re: Good VLB card benchmark. Standard clocked ISA writes make CPU hiccup and are for example mayor bottleneck in Doom.

rasz_pl wrote on 2023-05-07, 14:01:

jakethompson1 wrote on 2023-05-03, 22:33:

I was thinking about these early Cirrus VLB chips the other day. Given that they only use 16 data bits

All CL VLB cards still wire full full 32bits. Im not sure why 😀

Because they have to. If the 486 processor reads a 16-bit value from address A000:0000, it insist of getting that value on data pins D0..D15. If the 486 processor reads a 16-bit value from address A000:0002, it insists on getting that value on data pins D16..D31. The same is true for writing. For example, the data to be written to B800:003 is output on D24..D31, whereas the data to be written to B800:0004 is output on D0..D7. This means that the 16 data bits of the Cirrus chip need to be dynamically switched between connecting to D0..D15 or D16..D31. That's why you usually find four 74F245 (or equally fast substitutes like the 74ALS245) next to the CL-GD542x chip. These chips can forward or block 8 bits each.

The same construction is used on ET4000AX VL graphics cards, too. Like the Cirrus chip, the ET4000AX only provides 16 data bits on the host interface. The ET4000/W32 on the other hand can take 32 bits at once.

mkarcher wrote on 2023-05-07, 15:31:

rasz_pl wrote on 2023-05-07, 14:01:

jakethompson1 wrote on 2023-05-03, 22:33:

I was thinking about these early Cirrus VLB chips the other day. Given that they only use 16 data bits

All CL VLB cards still wire full full 32bits. Im not sure why 😀

Because they have to. If the 486 processor reads a 16-bit value from address A000:0000, it insist of getting that value on data pins D0..D15. If the 486 processor reads a 16-bit value from address A000:0002, it insists on getting that value on data pins D16..D31.

ah, its doing word steering on its side of VLB slot. datasheet:

OEH# O OUTPUT ENABLE HIGH#: This active-low output controls the output enables for
the data transceivers that connect the CL-GD542X SD[15:0] pins to the ’486 or
VESA VL-Bus D[31:16] pins.
OEL# O OUTPUT ENABLE LOW#: This active-low output controls the output enables for the
data transceivers that connect the CL-GD542X SD[15:0] pins to the ’486 or VESA
VL-Bus D[15:0] pins.

+ I found diagram inside 'SiS 85C460 98134-925-009_DeskMaster_486Q_SD925E_Service_Manual_1993'

So the card itself sends /LBS16, but still has to obey /BE[0-3] and handle word steering on its own.

rasz_pl wrote on 2023-05-08, 05:25:

So the card itself sends /LBS16, but still has to obey /BE[0-3] and handle word steering on its own.

Exactly. /LBS16 does not do any byte/word swapping. It just tells the processor that if /BE0 or /BE1 was asserted for the cycle, /BE2 and /BE3 were ignored and the processor should re-issue a bus cycle without /BE0 and /BE1 to get the missing bytes. The 486 processor also has /BS8 (but that pin is not exposed on the VLB) which is used if you only handled the lowest requested byte. Again, an 8-bit device using /BS8 has to do byte steering in the device, the 486 processor does not do any remapping.

p6889k wrote on 2021-09-08, 11:06:

Thank you everyone for your responses. Looks like this card is not that interesting, so I'll wait for something else. Don't need it urgently now.

According to theses tests (#1, #2) it pretty much doesn't matter which VLB card you use under DOS (at least of the 4 he tested). They all perform similar.

HanSolo wrote on 2023-05-11, 12:08:

According to theses tests (#1, #2) it pretty much doesn't matter which VLB card you use under DOS (at least of the 4 he tested). They all perform similar.

Indeed... most games were written for ISA cards, so they were optimized to use as little memory bandwidth as possible. Most of these games run in 320x200 mode in 256 colours. And various games only update pixels with 8-bit writes anyway, such as Wolf3D and DOOM (they render in columns, because they are raycasting anyway, which makes mode X very efficient).
You really start noticing the difference when games start using SVGA modes, in 640x480 and beyond. But then you are in the transitional period between DOS and Windows 9x for gaming.