Signal level compatibility issue. Usually it needs other monitor (CRT is ideal) or old TFT (I use JVC LM-15G for such old videocards)

Babasha wrote on 2023-07-10, 11:07:

Signal level compatibility issue. Usually it needs other monitor (CRT is ideal) or old TFT (I use JVC LM-15G for such old videocards)

Thanks for Your input - I'v just tested on a CRT monitor - no problems whatsoever. It definitely have to do with resolution switching - in case You described above... I'm afraid not much can be done to fix it...?

It could be a problem of the Ramdac. If you have another ISA card you could try. Usually these Ramdacs even though are different parts, most of the time they are just clones of each other, just look for another chip with "476" on top.

It's not about levels, it's about timings and it's entirely digital.
The LCD monitor samples the signal in the wrong spot in time. The pixel clock on Tseng or LCD monitor is either jittering, or drifting.
At the very least LCD could use "auto adjustment" button press to move phases around, so sampling will not happen on the edge between pixels.

First, thanks for all the posts guys and showing Your interest in this topic

aaronkatrini wrote on 2023-07-11, 19:22:

It could be a problem of the Ramdac. If you have another ISA card you could try. Usually these Ramdacs even though are different parts, most of the time they are just clones of each other, just look for another chip with "476" on top.

I have one more ISA card - in my 286 - Trident TVGA8900C 8916CX2/4/8 LC2 REV.A 3010 - out of curiosity I tested this card with mentioned monitor (IBM L151) and it turns out this card is also suffering from the same problem when being connected to IBM L151 - I think that Ramdac's are probably fine on both cards - seems like the IBM L151 is somehow "cursed" when it comes to working with ISA graphics cards.

This IBM monitor works perfectly normal with a S3 Trio PCI card, no issues - probably will work as well with other PCI cards, didnt tested yet.

On top of that I tested both cards with some other LCD monitors and TV's (older and newer) - whatever I had at hand like older 17' NEC Monitor, newer 23' AOC monitor a middle-aged SONY LCD 32' TV and all of them worked just fine without issues simillar to what is shown on the Video.

vstrakh wrote on 2023-07-12, 06:54:

It's not about levels, it's about timings and it's entirely digital.
The LCD monitor samples the signal in the wrong spot in time. The pixel clock on Tseng or LCD monitor is either jittering, or drifting.
At the very least LCD could use "auto adjustment" button press to move phases around, so sampling will not happen on the edge between pixels.

This makes me wonder - looks like the IBM L151 monitor "is a problem" here, not the ISA cards - or rather this specific monitor in conjunction with (any?) ISA graphics card - is like, finding a "cure" would be nice (tinkering with the monitor? replacing some components? have no idea...) but narrowing down the culprit of a problem, just to "fully understand" what is the root cause of it to simply gain knowledge and being able to say "this wont work because..." would be equally great.

So... if anyone have some more ideas what to check/test/tinker with - I'll be really glad 😀

To me that video looks like an issue that might arise if a monitor genlocked only to the pixel data signal of the input video (and not simultaneously to the hsync&vsync signals), and resulted in a reconstructed clock signal where the horizontal sync signal was not stable at the edges of the reconstructed clock.

As a result, at the start of each scanline when hsync is about to transition from active (in h-blank) to inactive (entering horizontal back porch), the hsync line would be sampled while still in the middle of this transition, and be sometimes randomly observed in flux, resulting in an intermittent one pixel offset adjustment whenever the scanline is sampled incorrectly.

With CRT Terminator ( CRT Terminator Digital VGA Feature Card ISA DV1000 ), I can coax a similar artifact to appear if I deliberately misconfigure it to sample hsync at the wrong edge of the clock signal. Typically this results in a +/-1 pixel offset to the resulting video signal horizontally.

Maybe the monitor implements VGA genlocking by just taking pixel data into account and not the hsync line. That is just a random theory though. Maybe give some other LCD monitors with VGA inputs a go?