First post, by superfury
What TLB lookups does a 80386 perform before giving up and traversing the page tables in RAM?
In other words, what's required for a TLB hit(validated non-faulting and non-pagetabletraversing) to succeed for reads and writes respectively?
I'd assume writes requiring to be dirty and writable in the TLB cache(nonwritable is invalid and nondirty requires traversing the PDE/PTE entries and updating the dirty bit), otherwise traversing the page tables?
But what happens during a kernel access to user memory? Does it use the user-marked TLB entries, or does it traverse the page tables(probably not faulting) and load it as a non-user TLB(U=0 in the TLB)?
Currently UniPCemu saves entries loaded and non-faulted into the TLB based on page number and present, with W=writable, P=1, U=user mode access,D=current D-bit of PTE. Writes require lookup with W=1,U=user mode access,P=1,D=1. Reads require only P=1,U=user mode access(any value of W and D).
Is that correct behaviour?
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